Received: by 2002:a25:c205:0:0:0:0:0 with SMTP id s5csp5140097ybf; Wed, 4 Mar 2020 18:11:21 -0800 (PST) X-Google-Smtp-Source: ADFU+vu3hfU/5z2TRA45GE4HEBsHa5H0OSx8stqAUSwA/V9N1d2jApllpXrZrnLWh6hprlD/BS2I X-Received: by 2002:a9d:2264:: with SMTP id o91mr4822674ota.328.1583374281243; Wed, 04 Mar 2020 18:11:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583374281; cv=none; d=google.com; s=arc-20160816; b=sJVHYYV/H4Dxo62/QpMJb8BPkBg2/URq8RelUX7jnrF+b+sfUhGUUVDJ8G3pd/YRRw AaiUZL60Wl3FVDUxZxZya+HuXDk8Fyud2dFfuye1qaBSS7kEkVA/+Shst+qJZY3EOxfE nACztLCdLIFnB49eBrDOn7AJOOYi18+4FYyka1s8Iukn9GvgiF4pbi8EQcdfoz4JG6eA L6sVd2N/C9rVwhEn6ykaBVmjXzsCbv2bm4vrJ91IDLh2Jqg865wWsgeOXZP+PXn6Fa3H ZwCQrsouDR55ljHZjzD1Qs7T6Q2sX3v4EDORS/GasZLZSsK1N/ovnBCB8ebYp9prlo8p EyFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=LuMdctmZonsJvASQsl+SCCw0TvShZ9YTY3ISHPSN4bA=; b=Jfrqnv66mU2t2N7OZbCvOtca15uP1KGJRCmMkOJQ/+TDrWscsRTOFpWdCCnDUGuLkE r6651sHM69DOO9wr9j0/M2kb04xlK/rfuVcDrX2SNi9UkOsc8lz0q9Noks/ByPy0jPAa pP0rB86ZZGXbnSV9YHRkIHOn+kNs41UoaHNZf7IolwGTysA4nXXA6W2xht2CWHgXTU1O EumrNnrnbZrN1PL6XAeKorsxbamcbqxKIVsaJ/yTeuSelVgK33LrV8y5GJZayFZrjIzI nZG46Go0sfTyppCF+hRrvvZr1TJSARlTFIGfPwDLFtTz9gulzbjiPSWX0QbDitty0ZQ8 d39A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d20si2422406oti.311.2020.03.04.18.11.10; Wed, 04 Mar 2020 18:11:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726079AbgCECKP (ORCPT + 99 others); Wed, 4 Mar 2020 21:10:15 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:10727 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726004AbgCECKN (ORCPT ); Wed, 4 Mar 2020 21:10:13 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 10BF391CC35432D2C8FB; Thu, 5 Mar 2020 10:10:10 +0800 (CST) Received: from localhost.localdomain (10.67.165.24) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Thu, 5 Mar 2020 10:10:01 +0800 From: Zaibo Xu To: , CC: , , , , , , , , , , Subject: [PATCH v3 3/5] crypto: hisilicon/sec2 - Add iommu status check Date: Thu, 5 Mar 2020 10:06:23 +0800 Message-ID: <1583373985-718-4-git-send-email-xuzaibo@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1583373985-718-1-git-send-email-xuzaibo@huawei.com> References: <1583373985-718-1-git-send-email-xuzaibo@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Longfang Liu In order to improve performance of small packets (<512Bytes) in SMMU translation scenario, we need to identify the type of IOMMU in the SEC probe to process small packets by a different method. Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu Reviewed-by: Jonathan Cameron --- drivers/crypto/hisilicon/sec2/sec.h | 1 + drivers/crypto/hisilicon/sec2/sec_main.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/crypto/hisilicon/sec2/sec.h b/drivers/crypto/hisilicon/sec2/sec.h index 13e2d8d..eab0d22 100644 --- a/drivers/crypto/hisilicon/sec2/sec.h +++ b/drivers/crypto/hisilicon/sec2/sec.h @@ -165,6 +165,7 @@ struct sec_dev { struct list_head list; struct sec_debug debug; u32 ctx_q_num; + bool iommu_used; u32 num_vfs; unsigned long status; }; diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c index 1fe2558..4f354d7 100644 --- a/drivers/crypto/hisilicon/sec2/sec_main.c +++ b/drivers/crypto/hisilicon/sec2/sec_main.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -832,6 +833,23 @@ static void sec_probe_uninit(struct hisi_qm *qm) destroy_workqueue(qm->wq); } +static void sec_iommu_used_check(struct sec_dev *sec) +{ + struct iommu_domain *domain; + struct device *dev = &sec->qm.pdev->dev; + + domain = iommu_get_domain_for_dev(dev); + + /* Check if iommu is used */ + sec->iommu_used = false; + if (domain) { + if (domain->type & __IOMMU_DOMAIN_PAGING) + sec->iommu_used = true; + dev_info(dev, "SMMU Opened, the iommu type = %u\n", + domain->type); + } +} + static int sec_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct sec_dev *sec; @@ -845,6 +863,7 @@ static int sec_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_set_drvdata(pdev, sec); sec->ctx_q_num = ctx_q_num; + sec_iommu_used_check(sec); qm = &sec->qm; -- 2.8.1