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References: <20200516042303.6070-1-andrew.smirnov@gmail.com> <befcc520-6556-b09b-0464-fe0b5f28cf1e@nxp.com>
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From:   Andrey Smirnov <andrew.smirnov@gmail.com>
Date:   Wed, 20 May 2020 03:16:37 +0000
Message-ID: <CAHQ1cqHWGJgZUf0zpPt9oX7hbokkwXf7gFGwbgtGSPTRpvNvaQ@mail.gmail.com>
Subject: Re: [PATCH] crypto: caam - make soc match data optional
To:     =?UTF-8?Q?Horia_Geant=C4=83?= <horia.geanta@nxp.com>
Cc:     "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
        Chris Healy <cphealy@gmail.com>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        Fabio Estevam <festevam@gmail.com>,
        dl-linux-imx <linux-imx@nxp.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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On Mon, May 18, 2020 at 6:59 PM Horia Geant=C4=83 <horia.geanta@nxp.com> wr=
ote:
>
> On 5/16/2020 7:23 AM, Andrey Smirnov wrote:
> > Vyrbrid devices don't have any clock that need to be taken care of, so
> > make clock data optional on i.MX.
> >
> Vybrid Security RM states that IPG clock used by CAAM
> can be gated by CCM_CCGR11[CG176].
>

Cool, looks like I missed this when I was looking through RM.

> Clock driver needs to be updated accordingly,
> and so will CAAM driver and DT node.
>
> I don't have a board at hand, so patch below is not tested.
>

I'll take it from here and test/submit appropriate patches. Thanks!

> Horia
>
> ------ >8 ------
>
> Subject: [PATCH] clk: imx: vf610: add CAAM clock
>
> According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to
> gate CAAM ipg clock.
>
> Signed-off-by: Horia Geant=C4=83 <horia.geanta@nxp.com>
> ---
>  drivers/clk/imx/clk-vf610.c             | 2 ++
>  include/dt-bindings/clock/vf610-clock.h | 3 ++-
>  2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
> index cd04e7dc1878..4f3066cf1b89 100644
> --- a/drivers/clk/imx/clk-vf610.c
> +++ b/drivers/clk/imx/clk-vf610.c
> @@ -439,6 +439,8 @@ static void __init vf610_clocks_init(struct device_no=
de *ccm_node)
>         clk[VF610_CLK_DAP] =3D imx_clk_gate("dap", "platform_bus", CCM_CC=
SR, 24);
>         clk[VF610_CLK_OCOTP] =3D imx_clk_gate("ocotp", "ipg_bus", CCM_CCG=
R6, CCM_CCGRx_CGn(5));
>
> +       clk[VF610_CLK_CAAM] =3D imx_clk_gate2("caam", "ipg_bus", CCM_CCGR=
11, CCM_CCGRx_CGn(0));
> +
>         imx_check_clocks(clk, ARRAY_SIZE(clk));
>
>         clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]=
);
> diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-binding=
s/clock/vf610-clock.h
> index 95394f35a74a..0f2d60e884dc 100644
> --- a/include/dt-bindings/clock/vf610-clock.h
> +++ b/include/dt-bindings/clock/vf610-clock.h
> @@ -195,6 +195,7 @@
>  #define VF610_CLK_WKPU                 186
>  #define VF610_CLK_TCON0                        187
>  #define VF610_CLK_TCON1                        188
> -#define VF610_CLK_END                  189
> +#define VF610_CLK_CAAM                 189
> +#define VF610_CLK_END                  190
>
>  #endif /* __DT_BINDINGS_CLOCK_VF610_H */
> --
> 2.17.1