Received: by 2002:a25:683:0:0:0:0:0 with SMTP id 125csp4404315ybg; Mon, 8 Jun 2020 07:06:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxfpu60c9hZa3to7MCGY3TUEqHFphCOt6so3MGUemAoKidCfJQ5bNSx12Jd8in1GsldCbhz X-Received: by 2002:aa7:cd4b:: with SMTP id v11mr22911459edw.356.1591625175487; Mon, 08 Jun 2020 07:06:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591625175; cv=none; d=google.com; s=arc-20160816; b=WzmtkBaupEymDAW32P1t2Zn0pdYFuTx1rtUXv19btInmwT7VQG6PPLrZqKed4GNLA7 1d5CYaqyNJX18LIu3jDKkxsQn17OiZOiy/84ULZdXhlmBz57/G74Zsntec4AlhbqjYOP IE7NvzETFVotCv4qoEx0pb1nBBJ1HKWcVDDKhyHXRcybYPPR7ViOSChI2qXvEsVMU+ev 12FRp1q4zXMA3oq61u7kjCPyGpsoau4+QsZczq8xH3Cc7pwo6EWhNRc1wD5bqODOgYSV lRLVdakgmnM0/jbCcGvfdAPOfZFEuJciJlK3yFNOemsqVR2DctH9VFqduP+SFxS4E4Rp BRZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=8Mk5Xuu70UFF6NFH3AwHD4gI5Fvtqr+8p05tiLFPBIs=; b=den4Uk27mWKJ19wFit8Gt7KDvm78UadiLS2hxJrNzTEYNAJhximfIgzbMvOu3NeY0C D3aw0V8oETBJLLBbwVNdtJhIPhDCtq291L/E3iDkOEhF/6VSyR+WjdY5ubDSY9nkDGzV np6QakcF8/oePk+AoacgW5GwCmBdSwcEs+28DZ2C0iDuArjHCTsT1lelWAsiwI/7BcvP M+cWdEl917uDws54DKzLYZOJMCQzNONSjJlQFgn1plpZN+tZLHZiIAVmqYJIL7/yFKqN Vp+vqGGbH+POmnK+GVW55JEzJb+cvV2axYbc0ZSMXl6+pcNXl/wIgbbbCf39MouPI/N4 RA5w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mj1si8698858ejb.668.2020.06.08.07.05.38; Mon, 08 Jun 2020 07:06:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728472AbgFHOBk (ORCPT + 99 others); Mon, 8 Jun 2020 10:01:40 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:5798 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726092AbgFHOBk (ORCPT ); Mon, 8 Jun 2020 10:01:40 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 9221E5032F1536D6C2DD; Mon, 8 Jun 2020 22:01:38 +0800 (CST) Received: from huawei.com (10.67.165.24) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Mon, 8 Jun 2020 22:01:32 +0800 From: Longfang Liu To: CC: , , , Subject: [PATCH] crypto: hisilicon - update SEC driver module parameter Date: Mon, 8 Jun 2020 22:01:11 +0800 Message-ID: <1591624871-49173-1-git-send-email-liulongfang@huawei.com> X-Mailer: git-send-email 2.8.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org As stress-ng running SEC engine on the Ubuntu OS, we found that SEC only supports two threads each with one TFM based on the default module parameter 'ctx_q_num'. If running more threads, stress-ng will fail since it cannot get more TFMs. In order to fix this, we adjusted the default values of the module parameters to support more TFMs. Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu --- drivers/crypto/hisilicon/sec2/sec_main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c index a4cb58b..57de51f 100644 --- a/drivers/crypto/hisilicon/sec2/sec_main.c +++ b/drivers/crypto/hisilicon/sec2/sec_main.c @@ -30,9 +30,9 @@ #define SEC_SQE_SIZE 128 #define SEC_SQ_SIZE (SEC_SQE_SIZE * QM_Q_DEPTH) -#define SEC_PF_DEF_Q_NUM 64 +#define SEC_PF_DEF_Q_NUM 256 #define SEC_PF_DEF_Q_BASE 0 -#define SEC_CTX_Q_NUM_DEF 24 +#define SEC_CTX_Q_NUM_DEF 2 #define SEC_CTX_Q_NUM_MAX 32 #define SEC_CTRL_CNT_CLR_CE 0x301120 @@ -191,7 +191,7 @@ static const struct kernel_param_ops sec_ctx_q_num_ops = { }; static u32 ctx_q_num = SEC_CTX_Q_NUM_DEF; module_param_cb(ctx_q_num, &sec_ctx_q_num_ops, &ctx_q_num, 0444); -MODULE_PARM_DESC(ctx_q_num, "Queue num in ctx (24 default, 2, 4, ..., 32)"); +MODULE_PARM_DESC(ctx_q_num, "Queue num in ctx (2 default, 2, 4, ..., 32)"); static const struct kernel_param_ops vfs_num_ops = { .set = vfs_num_set, -- 2.8.1