Received: by 2002:a25:e74b:0:0:0:0:0 with SMTP id e72csp1117828ybh; Thu, 23 Jul 2020 00:23:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy5ycT9DOf+MM+quyBcB9EYeAOSiSzh9CAAY/3s3fEtIzUL5VAW1WBC9BqgDiKwgu1cR2k8 X-Received: by 2002:a05:6402:d0d:: with SMTP id eb13mr1563506edb.307.1595489010510; Thu, 23 Jul 2020 00:23:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1595489010; cv=none; d=google.com; s=arc-20160816; b=HCx+Ie/ZgdjXEJ89PSocCpcy89PG22D8vJyOCNXbHIIkS2Q3CTGBEK1oUFUYRE4znc ufZzuk1cA0itTdlJVY5E/UBoDT4+5LYLX40FSAo6iw/XV+yx499HQwS4YI2adfaOeWFz gABvSHe7DTnZTXQ6hLqdRmRHx5P6v5056el4niebhWhvWuxaeh/wq9D8CBks5EyrWaJE lAPA3C/uv7z/8zmy/NdNdJsJqt+YiNGla/CDQpxGA9VPd7Ah03u8rQ+Mw7lf03JtDyXb rk5G5VgD+T53cPgrRoDHY1sBQNfOmfesiKtYAPCmLWIdzGBTp6PZiv7yVVG5J0X4Putb P3bA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=JQuDB8Rl/ZRgwfCH/TvCCsWzox2zZzdelqve7ARPvMU=; b=r4WTwUzuWPaPO3cWpE/rexL60Z1wXAPGTmwDWC6skMLIWqpeTx/3/gHbAEoYFwSjAB 9422Zxw9CcFrT3VfsAXSCfgCTzMM8nSO9sQDTJ4YWHpLEMtSnAJPvvKu13Bs8KJS/UlL 6cwYPWK3UZKoO3qN+jmldiP+CL3GTSTMrpp/gJ1l5DoKPDjwNu87csJys9S7St1PtPhO R0D+Oluy25KQ6CmCJj+vxRiY8MPKpCg56XDUPSjc92Vx7BAhuFIidScjFCc+d+fS/kYv JLBnvo3/bSxYZxxOxzsJOYvHO0D4ZEqvYgeC+jotRLezwke8rkiz2VENu9T78ThCh5cu pIRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f7si1062068eds.24.2020.07.23.00.23.07; Thu, 23 Jul 2020 00:23:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726952AbgGWHV6 (ORCPT + 99 others); Thu, 23 Jul 2020 03:21:58 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:8364 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725857AbgGWHV5 (ORCPT ); Thu, 23 Jul 2020 03:21:57 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 24529CC1DF1E3AF3E0E7; Thu, 23 Jul 2020 15:21:52 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Thu, 23 Jul 2020 15:21:44 +0800 From: Yang Shen To: , CC: , , Subject: [PATCH v3 07/10] crypto: hisilicon/qm - fix VF not available after PF FLR Date: Thu, 23 Jul 2020 15:19:37 +0800 Message-ID: <1595488780-22085-8-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595488780-22085-1-git-send-email-shenyang39@huawei.com> References: <1595488780-22085-1-git-send-email-shenyang39@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Shukun Tan When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa12a9("crypto: hisilicon - add FLR support") Signed-off-by: Shukun Tan Signed-off-by: Yang Shen Reviewed-by: Zhou Wang --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 427c3e0..914771f 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -3317,6 +3317,9 @@ static int qm_vf_reset_prepare(struct hisi_qm *qm, continue; if (pci_physfn(virtfn) == pdev) { + /* save VFs PCIE BAR configuration */ + pci_save_state(virtfn); + ret = hisi_qm_stop(vf_qm, stop_reason); if (ret) goto stop_fail; @@ -3480,6 +3483,9 @@ static int qm_vf_reset_done(struct hisi_qm *qm) continue; if (pci_physfn(virtfn) == pdev) { + /* enable VFs PCIE BAR configuration */ + pci_restore_state(virtfn); + ret = qm_restart(vf_qm); if (ret) goto restart_fail; -- 2.7.4