Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp346377pxa; Tue, 4 Aug 2020 07:06:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxeuyqcHZ4XGmCx7sR7YWstGCExNDgZZlF/GNdWNMbIVWJI4nFTnpkjXg5jrPjAdlsqirus X-Received: by 2002:a05:6402:1427:: with SMTP id c7mr21421639edx.245.1596549994368; Tue, 04 Aug 2020 07:06:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596549994; cv=none; d=google.com; s=arc-20160816; b=OK6ePdEuY5PPdAkwyezH1E0N9B8tBLGEpZDMHkChmtI0Y5zVf7MlZzA3j1aTryKqDy higv3FCOTw01n/8Yp3BFAwR0mNVT/BFISXBh9uWUZnUp9KovcLsJUx3UqcTuRVoXWqCs eqG3fZPtlw+/qLFhviXWGSXnOpnwKWlCX4eZ/V4k+Zuz+8Yxakn5dX9oIAYCIhkcBoIW yv++BSBDXVIez91c7WolN+CSbvUfOl6iVEXjcOKNuVxc5AYD9xdFEsT51RzuZjNSfaaj W0LEdxEQ5ZMZssI4HZDysjqeuKzzGjp3T9p4EFmmbNEpXCgUFdAPPz8iemoLR0QAALoY I8hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=JQuDB8Rl/ZRgwfCH/TvCCsWzox2zZzdelqve7ARPvMU=; b=JYlRRXz+SFJBL99ipqNKny4++GkI+Snves+Tdl7NQTEilpPmLuTWHMUCJohBYMZBQK C4so9/HXughs2NpRpSMrHnPnsAQDB/cikCGPmuKVbOaBDbE9KVlhoc5FnL66MNbFWktN b0GDYW265gH8w1igFibpRB+t1tzDasIcNK9jQPx3OmuLrGzlpmnbB9hlCtqQ4EJMr/gi gvjZws6kD60lQ6iMpMRTPPCNmqY508bEsK1j9dg7DLIE2O8G3rrDux7hQXSG3sPB2GpX nx9o2jvao/YcdekKDFP5jW8O4ix7VU0XwJsUjYwE8r7IQS6LjWyOY+ja+GKzGLhWXNoZ WXMA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j2si10307410edt.577.2020.08.04.07.06.09; Tue, 04 Aug 2020 07:06:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728852AbgHDOFB (ORCPT + 99 others); Tue, 4 Aug 2020 10:05:01 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:60916 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728775AbgHDOAt (ORCPT ); Tue, 4 Aug 2020 10:00:49 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B2DCDC35B44826558FDF; Tue, 4 Aug 2020 22:00:38 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Tue, 4 Aug 2020 22:00:31 +0800 From: Yang Shen To: , CC: , , , Subject: [PATCH v4 07/10] crypto: hisilicon/qm - fix VF not available after PF FLR Date: Tue, 4 Aug 2020 21:58:27 +0800 Message-ID: <1596549510-2373-8-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596549510-2373-1-git-send-email-shenyang39@huawei.com> References: <1596549510-2373-1-git-send-email-shenyang39@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Shukun Tan When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa12a9("crypto: hisilicon - add FLR support") Signed-off-by: Shukun Tan Signed-off-by: Yang Shen Reviewed-by: Zhou Wang --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 427c3e0..914771f 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -3317,6 +3317,9 @@ static int qm_vf_reset_prepare(struct hisi_qm *qm, continue; if (pci_physfn(virtfn) == pdev) { + /* save VFs PCIE BAR configuration */ + pci_save_state(virtfn); + ret = hisi_qm_stop(vf_qm, stop_reason); if (ret) goto stop_fail; @@ -3480,6 +3483,9 @@ static int qm_vf_reset_done(struct hisi_qm *qm) continue; if (pci_physfn(virtfn) == pdev) { + /* enable VFs PCIE BAR configuration */ + pci_restore_state(virtfn); + ret = qm_restart(vf_qm); if (ret) goto restart_fail; -- 2.7.4