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Date:   Thu, 13 Aug 2020 10:54:07 +1000
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Srujana Challa <schalla@marvell.com>
Cc:     davem@davemloft.net, netdev@vger.kernel.org,
        linux-crypto@vger.kernel.org, schandran@marvell.com,
        pathreya@marvell.com, sgoutham@marvell.com, lcherian@marvell.com,
        gakula@marvell.com, jerinj@marvell.com
Subject: Re: [PATCH v2 2/3] drivers: crypto: add support for OCTEONTX2 CPT
 engine
Message-ID: <20200813005407.GB24593@gondor.apana.org.au>
References: <1596809360-12597-1-git-send-email-schalla@marvell.com>
 <1596809360-12597-3-git-send-email-schalla@marvell.com>
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On Fri, Aug 07, 2020 at 07:39:19PM +0530, Srujana Challa wrote:
>
> +#if defined(CONFIG_ARM64)
> +static inline long otx2_lmt_flush(void *ioreg)
> +{
> +	long result = 0;
> +
> +	__asm__ volatile(".cpu  generic+lse\n"
> +			 "ldeor xzr, %0, [%1]\n"
> +			 : "=r" (result)
> +			 : "r" (ioreg) : "memory");
> +
> +	return result;
> +}
> +
> +#else
> +#define otx2_lmt_flush(addr)     ({ 0; })
> +#endif

This is not acceptable.  Please work out a way with the ARM folks
to fix this without adding assembly code in a driver.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt