Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp1504309pxa; Sun, 16 Aug 2020 00:27:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyp7vptc0to456UjqHea6CTaVdbF9sZpnEFCpPxcdJoAd8YXV1qq0XNlsF6F9MU4h2LEYk3 X-Received: by 2002:a17:906:845:: with SMTP id f5mr9672985ejd.34.1597562855573; Sun, 16 Aug 2020 00:27:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597562855; cv=none; d=google.com; s=arc-20160816; b=GpKwyRmmZtNqe9SeBlmXbqGJiWKpApdYLVciQe4Wclxu1lmf/6mU6osjZ4dHrA7dPD Dokmca67M04N+FkuopJXRp2sXjHR5FqyunlY6GFNeDAgpxJHp/QUk3NW5mNiQyaOquD3 0/99g6RI5qcVI6ncQrZh2DISQjwH5PwjJDvcis5NBBUAHwwPpPkfF6Yjrw4K1lBR3GEk 8HcuRgz8HejHonRdhKFWsyMKWQFWJt4mimPSsHKCDhk8Lb3Scy6QxFArcttYo5hjTWsN DoZLctglYmXhE67R6CcTA/z8Ar80FZmGDjnD1sDrWfOEp0K9hSX00bCHvboiAW3RpIhe 6H/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=/j7j/eCrsVTBty3p1pqTQs3XK3sv2Rp1xZz83EeaqGY=; b=ShrQpZ8G7GqEFVjgZs/llnOXRCAYjWgeavBlnkY9zFsuslMVUlKJbsdbwFT2Z9nYRJ r87sCFG6R1yimbETE87Ezs3zqaC9VYvB/XsU6mA9Hg/uwQIUdi4YR5cylJMm1Fcu0l30 GUQY6jh4FlVIuK2MF0n7SWXI85JhjYBCZrgQrQEzpwyG9JCw3rQsGxlRusxdSsuyTy2l ea17b0x9hUh3jzqYOzUweCtGUegXxHrgj5wY90wn0wZiFW+gky6lfL2rksU7xB0n7Vji HXnMwHAOGYvFvT82wBqS1QyqPHFZS195MlPJY/fzRQYYM5XTZEPoBT4N17Z9ObhejNuN 7oHQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cf25si9780574ejb.690.2020.08.16.00.27.12; Sun, 16 Aug 2020 00:27:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729405AbgHPBor (ORCPT + 99 others); Sat, 15 Aug 2020 21:44:47 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33840 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729375AbgHPBoR (ORCPT ); Sat, 15 Aug 2020 21:44:17 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 13B3D84A753A634FEC0D; Sat, 15 Aug 2020 17:58:34 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Sat, 15 Aug 2020 17:58:25 +0800 From: Yang Shen To: , CC: , , , Subject: [PATCH v5 07/10] crypto: hisilicon/qm - fix VF not available after PF FLR Date: Sat, 15 Aug 2020 17:56:14 +0800 Message-ID: <1597485377-2678-8-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597485377-2678-1-git-send-email-shenyang39@huawei.com> References: <1597485377-2678-1-git-send-email-shenyang39@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Shukun Tan When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa12a9("crypto: hisilicon - add FLR support") Signed-off-by: Shukun Tan Signed-off-by: Yang Shen Reviewed-by: Zhou Wang --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 6d233b4..3c37e00 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -3318,6 +3318,9 @@ static int qm_vf_reset_prepare(struct hisi_qm *qm, continue; if (pci_physfn(virtfn) == pdev) { + /* save VFs PCIE BAR configuration */ + pci_save_state(virtfn); + ret = hisi_qm_stop(vf_qm, stop_reason); if (ret) goto stop_fail; @@ -3481,6 +3484,9 @@ static int qm_vf_reset_done(struct hisi_qm *qm) continue; if (pci_physfn(virtfn) == pdev) { + /* enable VFs PCIE BAR configuration */ + pci_restore_state(virtfn); + ret = qm_restart(vf_qm); if (ret) goto restart_fail; -- 2.7.4