Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp4621430pxu; Tue, 13 Oct 2020 03:05:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJytxUnynRf1Y+KJ1UZRJdI5b3h+BEkdwNwwauCgtZ1NbL+C7SkUU3tlQ+C2Sk9Apgh6rW6H X-Received: by 2002:aa7:ca1a:: with SMTP id y26mr19639468eds.334.1602583554784; Tue, 13 Oct 2020 03:05:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602583554; cv=none; d=google.com; s=arc-20160816; b=m2VYv3IZQw++G/Rg/jbJ4OLqKTnp1wdL9qCL+j+zBDdaK/9ENOuT9VWP3w1Uu5DJPP d//XCMexId6Jmbt0bPiz2di4hKd6C8SXuEd8Ev8MaX0jKWG+rqUWkUswuUjU1wlpXl2x LWhDSXoP4XBbdaOMyXbeolcfwZNiGV0uEBBlXepSkowcp6wRUX1wGqIOC+Gx5W3FQMwi /UPJxmXkf0EJEXNxHuyJ9NoYIsgaGXlt8m+5rv5hROgWzS5Jypwrplki6z4MHJHuOBSa 6T1fjt5Y0m3iQhkEzGgbkh/1Th7/dUgZ8A+6bXen6TJ+gSzEfCZJGQgVYra24OpucrQL Q60A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :ironport-sdr:ironport-sdr; bh=zops3sjkVMLiVuBZuwJpPotgmXxOGFT4F+aSU7egb+s=; b=i5uA/oDY/yXs7OMpP0gl3Y9obFN4GitmPRUSxzkJGJEGHFA/illwQpAJ/1/TE4Cyvq HKPJ+238Uz2PNNBOgNPIN2npTWb8nogVYxtXvZiGj0VjiNuOzTSjJWvykz0tROUM1bkF gU41MTa1awBp3wCMSp8DwxXwuvzx3f+DbTJTIDijxRFVqygkynKz1X9LU5iOsikFix5m Pz0k0vSdPqcOlIq4tjCaPT6MnF5KDU3k2GQFTw4TNJqXv0xLcIwRRrAWBCDmEYuazIEu X65tG5/2QJktDmQpw+yPZKO/PTUZ1tp58mPXIOnnPEYDkuc45RwQH961/AA49yfBqZlr Q5zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d23si14333198edr.183.2020.10.13.03.05.31; Tue, 13 Oct 2020 03:05:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388023AbgJLUkA (ORCPT + 99 others); Mon, 12 Oct 2020 16:40:00 -0400 Received: from mga09.intel.com ([134.134.136.24]:34144 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387999AbgJLUj6 (ORCPT ); Mon, 12 Oct 2020 16:39:58 -0400 IronPort-SDR: +NHqlfjUxLQfu3VoS5TnNp9mRIW0eOvVRetf3hg95VEDVJZAZopuz+EWjujQOAsvy3NJahEcqA npUJIg6jq+oA== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="165913202" X-IronPort-AV: E=Sophos;i="5.77,367,1596524400"; d="scan'208";a="165913202" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2020 13:39:58 -0700 IronPort-SDR: eGYZzlgQj3e60Gk4WmIBNu4ZzMiy2xpo3y7irtR5q8NEMEITrCafI2hBeGVkUH5qTGv2Y3H9z0 PKbKLQAJekyg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,367,1596524400"; d="scan'208";a="299328295" Received: from silpixa00400314.ir.intel.com (HELO silpixa00400314.ger.corp.intel.com) ([10.237.222.51]) by fmsmga007.fm.intel.com with ESMTP; 12 Oct 2020 13:39:56 -0700 From: Giovanni Cabiddu To: herbert@gondor.apana.org.au Cc: linux-crypto@vger.kernel.org, qat-linux@intel.com, Giovanni Cabiddu , Wojciech Ziemba , Fiona Trahe , Andy Shevchenko Subject: [PATCH 31/31] crypto: qat - extend ae_mask Date: Mon, 12 Oct 2020 21:38:47 +0100 Message-Id: <20201012203847.340030-32-giovanni.cabiddu@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012203847.340030-1-giovanni.cabiddu@intel.com> References: <20201012203847.340030-1-giovanni.cabiddu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Change type of ae_mask in adf_hw_device_data to allow for devices with more than 16 Acceleration Engines (AEs). Signed-off-by: Giovanni Cabiddu Reviewed-by: Wojciech Ziemba Reviewed-by: Fiona Trahe Reviewed-by: Andy Shevchenko --- drivers/crypto/qat/qat_common/adf_accel_devices.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h index a3b63dfe4d7b..996d25565b11 100644 --- a/drivers/crypto/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h @@ -181,7 +181,7 @@ struct adf_hw_device_data { u32 accel_capabilities_mask; u32 instance_id; u16 accel_mask; - u16 ae_mask; + u32 ae_mask; u32 admin_ae_mask; u16 tx_rings_mask; u8 tx_rx_gap; -- 2.26.2