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Date:   Wed, 14 Oct 2020 16:58:11 -0700
From:   Jakub Kicinski <kuba@kernel.org>
To:     Srujana Challa <schalla@marvell.com>
Cc:     <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
        <netdev@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
        <sgoutham@marvell.com>, <gakula@marvell.com>,
        <sbhatta@marvell.com>, <schandran@marvell.com>,
        <pathreya@marvell.com>
Subject: Re: [PATCH v7,net-next,04/13] drivers: crypto: add Marvell
 OcteonTX2 CPT PF driver
Message-ID: <20201014165811.7f2d8ced@kicinski-fedora-PC1C0HJN.hsd1.ca.comcast.net>
In-Reply-To: <20201012105719.12492-5-schalla@marvell.com>
References: <20201012105719.12492-1-schalla@marvell.com>
        <20201012105719.12492-5-schalla@marvell.com>
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On Mon, 12 Oct 2020 16:27:10 +0530 Srujana Challa wrote:
> +union otx2_cptx_lf_misc_int {
> +	u64 u;
> +	struct otx2_cptx_lf_misc_int_s {
> +		u64 reserved_0:1;
> +		u64 nqerr:1;
> +		u64 irde:1;
> +		u64 nwrp:1;
> +		u64 reserved_4:1;
> +		u64 hwerr:1;
> +		u64 fault:1;
> +		u64 reserved_7_63:57;
> +	} s;
> +};

AFAIK bitfields don't jive with endianness, please don't use them.
The Linux kernel is supposed to work regardless of host CPU endian.