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Miller" Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Mark Gross , Declan Murphy , Daniele Alessandrelli Subject: [PATCH 0/3] crypto: Add Keem Bay OCS HCU driver Date: Fri, 16 Oct 2020 18:27:56 +0100 Message-Id: <20201016172759.1260407-1-daniele.alessandrelli@linux.intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The Intel Keem Bay SoC has an Offload Crypto Subsystem (OCS) featuring a Hashing Control Unit (HCU) for accelerating hashing operations. This driver adds support for such hardware thus enabling hardware-accelerated hashing on the Keem Bay SoC for the following algorithms: - sha224 and hmac(sha224) - sha256 and hmac(sha256) - sha384 and hmac(sha384) - sha512 and hmac(sha512) - sm3 and hmac(sm3) The driver is passing crypto manager self-tests, including the extra tests (CRYPTO_MANAGER_EXTRA_TESTS=y). Daniele Alessandrelli (1): MAINTAINERS: Add maintainers for Keem Bay OCS HCU driver Declan Murphy (2): dt-bindings: crypto: Add Keem Bay OCS HCU bindings crypto: keembay: Add Keem Bay OCS HCU driver .../crypto/intel,keembay-ocs-hcu.yaml | 52 + MAINTAINERS | 11 + drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/keembay/Kconfig | 23 + drivers/crypto/keembay/Makefile | 5 + drivers/crypto/keembay/keembay-ocs-hcu-core.c | 1473 +++++++++++++++++ drivers/crypto/keembay/ocs-hcu.c | 590 +++++++ drivers/crypto/keembay/ocs-hcu.h | 113 ++ 9 files changed, 2270 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml create mode 100644 drivers/crypto/keembay/Kconfig create mode 100644 drivers/crypto/keembay/Makefile create mode 100644 drivers/crypto/keembay/keembay-ocs-hcu-core.c create mode 100644 drivers/crypto/keembay/ocs-hcu.c create mode 100644 drivers/crypto/keembay/ocs-hcu.h base-commit: 3093e7c16e12d729c325adb3c53dde7308cefbd8 -- 2.26.2