Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp1008708pxb; Fri, 13 Nov 2020 01:32:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJxc1aQw+qI8wATy6oXKLUlrSX0cd5+oDVhmEhd02Ef7tJZji449bd5PtiEDONhNBbd3UzEk X-Received: by 2002:a17:906:745:: with SMTP id z5mr1145414ejb.408.1605259974421; Fri, 13 Nov 2020 01:32:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605259974; cv=none; d=google.com; s=arc-20160816; b=it/d9bul/4BSs0H+hvFsMoDWwrqrYoTl2iORRbzrB3TTyI4+w1FYKHaL8HHEtK1QPN UaD5Ab6khWk2RMU/bD9YsYqBN7l8EaevSyzV/G3lmSVGayS9U43Z+OJt5PQTpnF4fg1K 8LGV3BqK7JsmycfC1t1U4K5RoIIQnY6U8qxKT7//1tdfof3PwzhTrZ0F0aAVtwi4hTfY lwo/yLNTroRdNcnwVTBL1he3NSPrECzB7DOFZ8JBWeNK9SU3f5Nym4htHTCx1ymZvF3O XOAws95pi7Ns3Wxm/yIcySDclfo98QWXizVPS0I6CgaRhs3+gJzRkW6GgWtGsbsi5kvR 9Axg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=T5q5+xW9OaSBQqrUXpTmuyP1NStlU0Q3O3oreo4KrAI=; b=VHFkrhVWaV2JZRKP7S2I1ZCJ/kh+0gtxrhfux8/s23woPt/BtH0QAu2Dxj9Znw+USF lB7ATPXlleVrju8CpCOM5R8CI6K+b9MZbnALkNWWguZh8E1KKWSlCWib8oejQ2ulA9wu HHW9mPYnuDCQwVtY1FX/Wf+oossWgyjaci1ebIHLLVSVvs3AkkswU/mubLVucUOKcbFH 2Dc+QcjsTefH+O2YwnzNX4Eu4Qr4YBeCZp1xkb2tZRlyMygGYFLeZUv9u+ZrR994zQ5i 0+gDFVFKPUH6rT2Zgn197TqtGjLi0LS/9b82OLjFeNOf5NPUf0xfBH1d4yyjApis1f9J L5VA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id hp25si2261549ejc.131.2020.11.13.01.32.25; Fri, 13 Nov 2020 01:32:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726176AbgKMJcY (ORCPT + 99 others); Fri, 13 Nov 2020 04:32:24 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:7189 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726149AbgKMJcX (ORCPT ); Fri, 13 Nov 2020 04:32:23 -0500 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4CXYCC4NGlz15L0Y; Fri, 13 Nov 2020 17:32:07 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.487.0; Fri, 13 Nov 2020 17:32:09 +0800 From: Yang Shen To: , CC: , , , Subject: [PATCH] crypto: hisilicon/zip - add a work_queue for zip irq Date: Fri, 13 Nov 2020 17:32:35 +0800 Message-ID: <1605259955-17796-1-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The patch 'irqchip/gic-v3-its: Balance initial LPI affinity across CPUs' set the IRQ to an uncentain CPU. If an IRQ is bound to the CPU used by the thread which is sending request, the throughput will be just half. So allocate a 'work_queue' and set as 'WQ_UNBOUND' to do the back half work on some different CPUS. Signed-off-by: Yang Shen Reviewed-by: Zaibo Xu --- drivers/crypto/hisilicon/zip/zip_main.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 3d1524b..4fb5a32b 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -747,6 +747,8 @@ static int hisi_zip_pf_probe_init(struct hisi_zip *hisi_zip) static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) { + int ret; + qm->pdev = pdev; qm->ver = pdev->revision; qm->algs = "zlib\ngzip"; @@ -772,7 +774,25 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) qm->qp_num = HZIP_QUEUE_NUM_V1 - HZIP_PF_DEF_Q_NUM; } - return hisi_qm_init(qm); + qm->wq = alloc_workqueue("%s", WQ_HIGHPRI | WQ_MEM_RECLAIM | + WQ_UNBOUND, num_online_cpus(), + pci_name(qm->pdev)); + if (!qm->wq) { + pci_err(qm->pdev, "fail to alloc workqueue\n"); + return -ENOMEM; + } + + ret = hisi_qm_init(qm); + if (ret) + destroy_workqueue(qm->wq); + + return ret; +} + +static void hisi_zip_qm_uninit(struct hisi_qm *qm) +{ + hisi_qm_uninit(qm); + destroy_workqueue(qm->wq); } static int hisi_zip_probe_init(struct hisi_zip *hisi_zip) @@ -854,7 +874,7 @@ static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id) hisi_qm_dev_err_uninit(qm); err_qm_uninit: - hisi_qm_uninit(qm); + hisi_zip_qm_uninit(qm); return ret; } @@ -872,7 +892,7 @@ static void hisi_zip_remove(struct pci_dev *pdev) hisi_zip_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); hisi_qm_dev_err_uninit(qm); - hisi_qm_uninit(qm); + hisi_zip_qm_uninit(qm); } static const struct pci_error_handlers hisi_zip_err_handler = { -- 2.7.4