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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id c18sm6159529oob.45.2020.11.17.19.59.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Nov 2020 19:59:50 -0800 (PST) Date: Tue, 17 Nov 2020 21:59:48 -0600 From: Bjorn Andersson To: Thara Gopinath Cc: agross@kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH 2/6] clk:qcom:rpmh: Add CE clock on sdm845. Message-ID: <20201118035948.GB8532@builder.lan> References: <20201117134714.3456446-1-thara.gopinath@linaro.org> <20201117134714.3456446-3-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201117134714.3456446-3-thara.gopinath@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Tue 17 Nov 07:47 CST 2020, Thara Gopinath wrote: > Qualcomm CE clock resource that is managed by BCM is required > by crypto driver to access the core clock. > ' ' after ':' in $subject With that Reviewed-by: Bjorn Andersson Regards, bjorn > Signed-off-by: Thara Gopinath > --- > drivers/clk/qcom/clk-rpmh.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c > index e2c669b08aff..7e2a4a9b9bf6 100644 > --- a/drivers/clk/qcom/clk-rpmh.c > +++ b/drivers/clk/qcom/clk-rpmh.c > @@ -349,6 +349,7 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); > DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); > DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1); > DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); > +DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0"); > > static struct clk_hw *sdm845_rpmh_clocks[] = { > [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, > @@ -364,6 +365,7 @@ static struct clk_hw *sdm845_rpmh_clocks[] = { > [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, > [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, > [RPMH_IPA_CLK] = &sdm845_ipa.hw, > + [RPMH_CE_CLK] = &sdm845_ce.hw, > }; > > static const struct clk_rpmh_desc clk_rpmh_sdm845 = { > -- > 2.25.1 >