Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp2418234pxu; Mon, 14 Dec 2020 01:38:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJyX7zVFNMvOy5N5YKobjWH0+AB0+ZDoFBR0UlfE0FW0Oc6XskN1WEBMzfLDFDfCdXtz3pYJ X-Received: by 2002:a17:906:4809:: with SMTP id w9mr21831686ejq.139.1607938695603; Mon, 14 Dec 2020 01:38:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607938695; cv=none; d=google.com; s=arc-20160816; b=gY6kTM1NZu2H6iqPA/LLT3kRDCu707Cvjxb74BxQFFnLPUwkBAwlIKkxmbIXLWHc5f ZmfaIv2SY0UPYKAOcua6k2f2r+Dcv4NyBnF3rHOZPYLy2IXrRILzfMbLjkgjXcLnrdcK k8tguH3QqVXJ0bA9QPEEKRPKX/Zz8uJsq6IGcz0y5FikhXmp6WSPwgjMTmooZYzu+3Xn bV7TNWKAz7D5qS2KycxtO4dNlQupWxutQE9KFj0MLvRARg5buTIXu/z1IAlkiVGKdDJt kk7wqzRvtxVW/MfmayH9YUedyX7ySwThIztEV6f4ZVPScI+Pxn4f68/ERpqy3Y7YxXCl j75w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=cOlrXYNVEcHkmLyYaldgoDyFVzuJphjd2UiKP7OxAD8=; b=jNVWE2ghYshofG72aDU+zDGV6MSDkecajhJ2+QgUId7d3c22g4gjK9IQrU30huqRoR QlCpFzRraHfc/xou5NFXHvO39oSREBXUi9NSTgL92aqfiBn0Brzm8rChea/1a6eWr5qf OENKIakdrBwY+Yv2DdK7icZaDGPbqyPTrElxJJHejCSV0PfbtU8m/jiWEU67+PkRa+Ol G104dIYcCVs+1dWawcyJXt4tuMvuC8b7QjpYUAa9iW3WZpa/Cn0FULtQhRIptQ3LBgYa PabVrv3HqSlbmZMymfQ3FULT47LoTgQ5P53yjPWWbMTJMqvLf0bohI/YI66fSrQSPoTS asyQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l4si9848489edt.49.2020.12.14.01.37.53; Mon, 14 Dec 2020 01:38:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437986AbgLNC3U (ORCPT + 99 others); Sun, 13 Dec 2020 21:29:20 -0500 Received: from ZXSHCAS2.zhaoxin.com ([203.148.12.82]:37360 "EHLO ZXSHCAS2.zhaoxin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730312AbgLNC3T (ORCPT ); Sun, 13 Dec 2020 21:29:19 -0500 Received: from zxbjmbx1.zhaoxin.com (10.29.252.163) by ZXSHCAS2.zhaoxin.com (10.28.252.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Mon, 14 Dec 2020 10:28:35 +0800 Received: from [10.32.56.37] (10.32.56.37) by zxbjmbx1.zhaoxin.com (10.29.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Mon, 14 Dec 2020 10:28:33 +0800 Subject: Re: [PATCH] crypto: x86/crc32c-intel - Don't match some Zhaoxin CPUs To: Eric Biggers CC: , , , , , , , , , , , , , , References: <1607686144-2604-1-git-send-email-TonyWWang-oc@zhaoxin.com> From: Tony W Wang-oc Message-ID: <1f8d17bf-c1d9-6496-d2f8-5773633011fb@zhaoxin.com> Date: Mon, 14 Dec 2020 10:28:19 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.32.56.37] X-ClientProxiedBy: ZXSHCAS1.zhaoxin.com (10.28.252.161) To zxbjmbx1.zhaoxin.com (10.29.252.163) Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 12/12/2020 01:43, Eric Biggers wrote: > On Fri, Dec 11, 2020 at 07:29:04PM +0800, Tony W Wang-oc wrote: >> The driver crc32c-intel match CPUs supporting X86_FEATURE_XMM4_2. >> On platforms with Zhaoxin CPUs supporting this X86 feature, When >> crc32c-intel and crc32c-generic are both registered, system will >> use crc32c-intel because its .cra_priority is greater than >> crc32c-generic. This case expect to use crc32c-generic driver for >> some Zhaoxin CPUs to get performance gain, So remove these Zhaoxin >> CPUs support from crc32c-intel. >> >> Signed-off-by: Tony W Wang-oc > > Does this mean that the performance of the crc32c instruction on those CPUs is > actually slower than a regular C implementation? That's very weird. > From the lmbench3 Create and Delete file test on those chips, I think yes. sincerely Tony