Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp2262250pxu; Fri, 18 Dec 2020 09:04:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJzYcCenTowkvcqih/5RHKct+C+6MzQe6i459FR0Wudddln/pDts2sqoBkWHRQY2kg1nt7Yx X-Received: by 2002:a17:906:32d6:: with SMTP id k22mr4946029ejk.457.1608311068906; Fri, 18 Dec 2020 09:04:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608311068; cv=none; d=google.com; s=arc-20160816; b=ZjUL69QkCsJRY8vP+DfTjt9wAmE48m0fdQHCteyzjl+mm4HLU/T/aknJ+qR941nVyB ggwUHryBhrMGFN1fy6KIBEBA88eFOdthOFLmRVv59fKueMs7CdF9wumj9/Zfdq5sqtAr fhvF9yTVYVhzHO9d3rE3QCv6u3KZxCDT3Lo9h5gkSHgnaBIqMOP1MzCmGnduws0aaVp/ GWjT067hhSXwu1NbfVv1QwcfE5DsRazh9GRPkwDXRFNboQpNKESdB1eTdWedoiua7Kvk EgJhwRP1TnVeYtLsI8aJEkVq5IUSl5DZZuQUoGEWBpGWK23UCMDcvbiErEIths6+cJ6f oakA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=Xy5++dl3wsn8gbcjrSIf9bLKgGgpq6IvBkkUBdsQugw=; b=srx50yXrrf9NpbvrLQIDF7/vu0AlLUXaMwNxnx8Ke2miWNYlP0f0FtItmoen3j7PAo PXTmgubKKl8Prs7cgU+w4LM9mtxOvrQdMQhQSCdWuiu7vJFsPH3Ty423y1Y6C6K8V9SX O48YXYcCMbO8Zi8pVjfDNiTh2JLc/Xu9R2qg777KFG1VkIGKrlgiBtj5ZpehjITxeqRu uARp4MY/8IPkLH+jsMiKTFyqBTNNGO/xT/Ucl3iNMET0rBRJQvT7To8EO2yDZ3TEtgGI RfqJjMFfLXC/ycuOdbqVo51g+kZDKAOE6pmgJbKmMM0tAHgBuuFVJMFjpvOOLM3n3BZD dH2w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a13si6636910edb.419.2020.12.18.09.03.52; Fri, 18 Dec 2020 09:04:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729057AbgLRRDq (ORCPT + 99 others); Fri, 18 Dec 2020 12:03:46 -0500 Received: from mail.kernel.org ([198.145.29.99]:54210 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725797AbgLRRDq (ORCPT ); Fri, 18 Dec 2020 12:03:46 -0500 From: Ard Biesheuvel Authentication-Results: mail.kernel.org; dkim=permerror (bad message/signature format) To: linux-crypto@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Ard Biesheuvel , Dave Martin , Mark Brown , Herbert Xu , Eric Biggers , Will Deacon , Catalin Marinas , Thomas Gleixner , Peter Zijlstra , Sebastian Andrzej Siewior , Ingo Molnar Subject: [RFC PATCH 0/5] running kernel mode SIMD with softirqs disabled Date: Fri, 18 Dec 2020 18:01:01 +0100 Message-Id: <20201218170106.23280-1-ardb@kernel.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org [ TL;DR for the non-ARM folks on CC: disabling softirq processing when using SIMD in kernel mode could reduce complexity and improve performance, but we need to decide whether we can do this, and how much softirq processing latency we can tolerate. If we can find a satisfactory solution for this, we might do the same for x86 and 32-bit ARM as well. ] The crypto API provides two ways to invoke symmetric encryption algorithms: - synchronously, where the transformation is guaranteed to be done by the time the function returns; - asynchronously, where the function may return with a -EINPROGRESS return code, and a completion will be signalled when the transformation is done. The latter is mainly intended for h/w accelerators, where the throughput would be severely limited by the latency otherwise. However, it is also being used for software algorithms based on SIMD instructions, which cannot be issued from any context (the rules are not the same on each architecture, but typically, SIMD can be used in task context, or in softirq context if it was not taken while the SIMD was already in use in kernel mode). Many users of the crypto API exist in the kernel today that opt out of this asynchronous interface (802.11, macsec, kerberos, sw kTLS), or use a library interface which is fundamentally synchronous (wireguard). This means we end up using a degraded mode for the contended case (a scalar fallback) as well as the uncontended case (generic GCM/CCM/CTR chaining mode templates wrapped around the SIMD cipher as opposed to accelerated implementations of the full chaining modes in question). Note that scalar AES runs ~20x slower than the SIMD instruction based version. So let's address this for arm64, by reorganizing kernel mode SIMD support so that the SIMD unit can always be assumed to be available. This means we need to defer softirq processing when grabbing the NEON unit in task context, so that any use of it in softirq context is guaranteed not to interrupt any code that was already using the NEON. This obviously impacts softirq processing latency, which is why the existing conditional NEON yield support is modified to take pending softirqs into account. As an example of how this impacts the code, the existing arm64 GCM driver is updated to: - Add yield support - currently, the pending softirq check is performed every 64 bytes of input, which is way too often - one of the desired outcomes of this RFC is getting a reasonable ballpark for how long we want to run with softirqs disabled. - Remove the existing scalar fallbacks, which are no longer needed. Questions: - what did I miss or break horribly? - does any of this matter for RT? AIUI, RT runs softirqs from a dedicated kthread, so I don't think it cares. - what would be a reasonable upper bound to keep softirqs disabled? I suppose 100s of cycles or less is overkill, but I'm not sure how to derive a better answer. - could we do the same on x86, now that kernel_fpu_begin/end is no longer expensive? Cc: Dave Martin Cc: Mark Brown Cc: Herbert Xu Cc: Eric Biggers Cc: Will Deacon Cc: Catalin Marinas Cc: Thomas Gleixner Cc: Peter Zijlstra Cc: Sebastian Andrzej Siewior Cc: Ingo Molnar Ard Biesheuvel (5): crypto: aead - disallow en/decrypt for non-task or non-softirq context crypto: skcipher - disallow en/decrypt for non-task or non-softirq context crypto: arm64/gcm-aes-ce - add NEON yield support arm64: fpsimd: run kernel mode NEON with softirqs disabled crypto: arm64/gcm-aes-ce - remove non-SIMD fallback path arch/arm64/crypto/ghash-ce-core.S | 115 ++++++----- arch/arm64/crypto/ghash-ce-glue.c | 209 +++++--------------- arch/arm64/include/asm/assembler.h | 19 +- arch/arm64/kernel/asm-offsets.c | 2 + arch/arm64/kernel/fpsimd.c | 4 +- crypto/aead.c | 10 + crypto/skcipher.c | 10 + 7 files changed, 155 insertions(+), 214 deletions(-) -- 2.17.1