Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp2064088pxf; Sat, 27 Mar 2021 01:35:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzGbTmo686OpPBZ7tLukSwmcwpBze0jUeiCWuDWwDOztXBinyjhSB/CWlY4NTcpLVOljz+4 X-Received: by 2002:a17:906:4015:: with SMTP id v21mr20088995ejj.433.1616834154390; Sat, 27 Mar 2021 01:35:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616834154; cv=none; d=google.com; s=arc-20160816; b=EdgasJniZ58WQzgE2VRQRwj32Lj1rv5d8QpL89QnvieKkRda2P6xfXRuIW6hoqS9px 7P6U1uDqYnEeCTFAm2eM800Yh6b8H0cKg9A9jsYpoqDfPCM84ASYtNgsnMo36XQw/enS KCfFjk+f5SI693mTW9UxANwf/lzgi46s0VS46T1gxYX0wOQg9JO8+5KVodvFJgPMRZjf FodxQv6vDPPmWQy6oX1R5KF1JSYUXSTuHvUjhNudyICryGTd4eFJuTwFbQz2cHBCG4E9 Oec52bbD1ZpHuM1sqeBQyz1Al/QIB6LpjppuHNLFmaLepNDhOnPz0y/LI1GamIRY19ze 9UwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=Lh7TDsSjBzLwpwsOgUQICrusqcJGN5+Mk8dyYUcRHq0=; b=R5yG9MwiAsAVgsj7kLEiktXIBw5cTM3DKg7JhgXpSjifjKLEMukAPdorO6gF/Tn83n N1KCM+rZ630DSJJQGJpZdr0hIMmdpxnA8VAf/ZWgbytXveagW0Ay3ksui+9leRFn/SdM OqBgZ6D+VqE6yRsf2a6Y0WUJBPJ1vDWH2fIhP9E9pn/9Bwv0SRHb8kk9f6B+xbOz2T0C zEwFWYgdUXP2H7ssUkjWMEIGbUNbhzpkJB5rr6JV7afdf2LIjAuNOZ2DTV0dzdzGgV4j OKrtJ1yBZLL2AC6SZscsalEPMLvZbzdk5gPqRj59wKBh6xCwdjp7q9tGPPPNnh1xJqCY BrLw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u3si4681865edc.305.2021.03.27.01.35.30; Sat, 27 Mar 2021 01:35:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230322AbhC0Ie7 (ORCPT + 99 others); Sat, 27 Mar 2021 04:34:59 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15070 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230299AbhC0Iew (ORCPT ); Sat, 27 Mar 2021 04:34:52 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4F6sXv22Xkz1BHy1; Sat, 27 Mar 2021 16:32:47 +0800 (CST) Received: from localhost.localdomain (10.67.165.24) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.498.0; Sat, 27 Mar 2021 16:34:39 +0800 From: Hui Tang To: , CC: , , , Subject: [PATCH] crypto: hisilicon/hpre - fix a typo and delete redundant blank line Date: Sat, 27 Mar 2021 16:32:08 +0800 Message-ID: <1616833928-9389-1-git-send-email-tanghui20@huawei.com> X-Mailer: git-send-email 2.8.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org s/shoul/should/ Signed-off-by: Hui Tang --- drivers/crypto/hisilicon/hpre/hpre_main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index f2605c4..8aae921 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -323,7 +323,7 @@ static int hpre_set_cluster(struct hisi_qm *qm) } /* - * For Kunpeng 920, we shoul disable FLR triggered by hardware (BME/PM/SRIOV). + * For Kunpeng 920, we should disable FLR triggered by hardware (BME/PM/SRIOV). * Or it may stay in D3 state when we bind and unbind hpre quickly, * as it does FLR triggered by hardware. */ @@ -1019,7 +1019,6 @@ static void hpre_remove(struct pci_dev *pdev) hisi_qm_uninit(qm); } - static const struct pci_error_handlers hpre_err_handler = { .error_detected = hisi_qm_dev_err_detected, .slot_reset = hisi_qm_dev_slot_reset, -- 2.8.1