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Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v2 00/17] Enable Qualcomm Crypto Engine on sm8250 Date: Thu, 6 May 2021 03:07:14 +0530 Message-Id: <20210505213731.538612-1-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Changes since v1: ================= - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ - v1 did not work well as reported earlier by Dmitry, so v2 contains the following changes/fixes: ~ Enable the interconnect path b/w BAM DMA and main memory first before trying to access the BAM DMA registers. ~ Enable the interconnect path b/w qce crytpo and main memory first before trying to access the qce crypto registers. ~ Make sure to document the required and optional properties for both BAM DMA and qce crypto drivers. ~ Add a few debug related print messages in case the qce crypto driver passes or fails to probe. ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA or the interconnect driver(s) (needed on specific Qualcomm parts) are not yet probed. Qualcomm crypto engine is also available on sm8250 SoC. It supports hardware accelerated algorithms for encryption and authentication. It also provides support for aes, des, 3des encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) authentication algorithms. Tested the enabled crypto algorithms with cryptsetup test utilities on sm8250-mtp and RB5 board (see [1]). While at it, also make a minor fix in 'sdm845.dtsi', to make sure it confirms with the other .dtsi files which expose crypto nodes on qcom SoCs. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Bhupesh Sharma (14): dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to optional properties dt-bindings: qcom-bam: Add 'iommus' to required properties dt-bindings: qcom-qce: Add 'iommus' to required properties dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to optional properties arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly dt-bindings: crypto : Add new compatible strings for qcom-qce arm64/dts: qcom: Use new compatibles for crypto nodes crypto: qce: Add new compatibles for qce crypto driver crypto: qce: Print a failure msg in case probe() fails crypto: qce: Convert the device found dev_dbg() to dev_info() dma: qcom: bam_dma: Create a new header file for BAM DMA driver crypto: qce: Defer probing if BAM dma is not yet initialized crypto: qce: Defer probe in case interconnect is not yet initialized arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. Thara Gopinath (3): dma: qcom: bam_dma: Add support to initialize interconnect path crypto: qce: core: Add support to initialize interconnect path crypto: qce: core: Make clocks optional .../devicetree/bindings/crypto/qcom-qce.txt | 22 +- .../devicetree/bindings/dma/qcom_bam_dma.txt | 5 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++ drivers/crypto/qce/core.c | 112 +++++-- drivers/crypto/qce/core.h | 3 + drivers/dma/qcom/bam_dma.c | 306 ++---------------- include/soc/qcom/bam_dma.h | 290 +++++++++++++++++ 9 files changed, 457 insertions(+), 317 deletions(-) create mode 100644 include/soc/qcom/bam_dma.h -- 2.30.2