Received: by 2002:a05:6a10:a852:0:0:0:0 with SMTP id d18csp811826pxy; Wed, 5 May 2021 14:42:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJygoe1iLBd+yh/sa0p85RbosRYXl2bskjgmdWvBCkFMiJRvBnmqKRPDbm7ThW8cYcPwl03e X-Received: by 2002:a17:906:3b13:: with SMTP id g19mr850001ejf.238.1620250932956; Wed, 05 May 2021 14:42:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620250932; cv=none; d=google.com; s=arc-20160816; b=Tlo91pvNkeidSqSUnSmmTDmKnb71er/RKoEhv5ghazbdyQXD64zLwEGkisGCAC+qEx 9SUqTHdBYgGW1v4cBJPoiquKcI6A+OJKA/qasWJxWH+o0I+Q85A4EWiWdleW1ooxRkL3 WDyu/4k3Zs7xiv8vZrqK+9VP582jF/g+oLUf2JzFXC6WGtCuCfK7zQZQuej2CbsowPvl HbaPRECG0uQGYeiD51ozuHf3vvpl5a1DEZBc0egWc4Pyo8ii/IHo/LJkN70/pAUFv7tc O5uUDDCGa5KM+IpTg+xgzMu38yjmnWGyHHEjPvM9yD9SzwybhlZSo0ETIGxzfWSuh6EG KaRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gqMsEIhJm5EqUOgNeJCrpzezZPASaD0w7LK6NRTqosc=; b=jbm98+fz9v+yhJxZ9AIU5dkxU4CH3MwoIdfSUSHNcG1jDKKEbNbiwNZ1317VoOeKHk ePSXDRHLVCkxpepUF4G4fYaIAamGSz3pG7NImccsZecWDRv5Jsa+SOjvvWD92ubGGoGP qtEd7fFwNjqskyTqCeYS4VYCt56Mc93v6HPbmcbi+V8XNFFoI38+hkncslr+sXtkgEYO FZxN26L2x3L9vcadng83X8MAX4jesmMi+UMvOQXO2l/9BbmNln/qIjNYp6juW3OZN7xS JDNOhl1P2W1daoyMd9Yj50Yj9yFFhBKwanOmemdsIivTJFeJRHz27P2eBX3k894D7ElX 33CA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pzbOscr8; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id hs9si411813ejc.643.2021.05.05.14.41.49; Wed, 05 May 2021 14:42:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pzbOscr8; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235007AbhEEVlN (ORCPT + 99 others); Wed, 5 May 2021 17:41:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230083AbhEEVk5 (ORCPT ); Wed, 5 May 2021 17:40:57 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D906C06135B for ; Wed, 5 May 2021 14:39:43 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id gc22-20020a17090b3116b02901558435aec1so1743628pjb.4 for ; Wed, 05 May 2021 14:39:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gqMsEIhJm5EqUOgNeJCrpzezZPASaD0w7LK6NRTqosc=; b=pzbOscr85X4EFeeMDqwg9QrjOk6I1RQdc7g7pzKkYlY3dH0iLlhi72s1X2XWWMpM2s QvGZNRQjdPZvog/lGq4VdeZwsy30G1ovMEGiKDjmnF3dpiEVc4VY5vkv6HYQJFCfUfTf i2bPSmolUuj9lE2IcWYgkJhuddwgjd4LvHe7l2qploh7CB3JM4FVgmVE1glQAwOS5XQq wXIuEO7FDs7Fxr281q7alYvVu70/98vHSffE3Mt3lSJZom2aMOIdBTKI+W/EJDYnSKVP +3vhZCJfnYs76p4pTF/qWbBBv+Gnqoqrb8c0v7bdxxb6M0wFGRWsHruT524pi7sgCoQC nisA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gqMsEIhJm5EqUOgNeJCrpzezZPASaD0w7LK6NRTqosc=; b=RUqLXEqI1z4TZKSQqybepLWq7neTyQuVHHReOXW0lMXPTIk2IDgPhuk0F/YeE9OVoe 8cIj/Jsnd+Rh0AB4zlRb40GMe1FCQNmzHHm1xXRXUM076JPLO1oNCIzaNYfs4HXEoxBb 58TZVPwR+P7n1FqdGTfczn0Jl3H9z/BPHzK9qHiY4fu2YyQQbOmmUgW45dugl74vWA4h YqvgvJRL/sP5HwHWuo9iyLONXyqOIdDLSztTthaCCXj1O8/DlMYDB9+ZZqvuYZIotSd5 20EndGRZ0qbw7j4Z34LD7rjUVQzkJAZWpKiZ9Y0XllA/G3Hcu6aWtsGc8bpfqt6y9idX 9coA== X-Gm-Message-State: AOAM531JnK0eeYiffoj03rhYEqLz4Kxnv5mbxpqvxqRACBJM4PzYFDoT JecBNEWwtxu+jtT+XvtUkWMqlg== X-Received: by 2002:a17:902:b609:b029:ec:e80d:7ebd with SMTP id b9-20020a170902b609b02900ece80d7ebdmr771721pls.75.1620250782828; Wed, 05 May 2021 14:39:42 -0700 (PDT) Received: from localhost.localdomain.name ([223.235.141.68]) by smtp.gmail.com with ESMTPSA id z26sm167031pfq.86.2021.05.05.14.39.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 May 2021 14:39:42 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v2 16/17] crypto: qce: Defer probe in case interconnect is not yet initialized Date: Thu, 6 May 2021 03:07:30 +0530 Message-Id: <20210505213731.538612-17-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210505213731.538612-1-bhupesh.sharma@linaro.org> References: <20210505213731.538612-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On some Qualcomm parts the qce crypto driver needs the interconnect between the crypto block and main memory to be initialized first before the crypto registers can be accessed. So it makes sense to defer the qce crypto driver probing in case the interconnect driver is not yet probed. This fixes the qce probe failure issues when both qce and interconnect drivers are compiled as static part of the kernel. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- drivers/crypto/qce/core.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 3e742e9911fa..9915b184f780 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -222,6 +222,20 @@ static int qce_crypto_probe(struct platform_device *pdev) return ret; qce->mem_path = of_icc_get(qce->dev, "memory"); + + /* Check for NULL return path, which indicates + * interconnect API is disabled or the "interconnects" + * DT property is missing. + */ + if (!qce->mem_path) + /* On some qcom parts, the qce crypto block needs interconnect + * paths to be configured before the registers can be accessed. + * Check here for the same. + */ + if (!strcmp(of_id->compatible, "qcom,ipq6018-qce") || + !strcmp(of_id->compatible, "qcom,sdm845-qce")) + return -EPROBE_DEFER; + if (IS_ERR(qce->mem_path)) return PTR_ERR(qce->mem_path); -- 2.30.2