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[71.163.245.5]) by smtp.gmail.com with ESMTPSA id a14sm3356422qtj.57.2021.05.20.18.47.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 May 2021 18:47:12 -0700 (PDT) Subject: Re: [PATCH v3 07/17] arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org Cc: Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> <20210519143700.27392-8-bhupesh.sharma@linaro.org> From: Thara Gopinath Message-ID: Date: Thu, 20 May 2021 21:47:11 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210519143700.27392-8-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 5/19/21 10:36 AM, Bhupesh Sharma wrote: > In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries > to support crypto engine."), we decided to use the value indicated > by constant RPMH_CE_CLK rather than using it directly. > > Now that the same RPMH clock value might be used for other > SoCs (in addition to sdm845), let's use the constant > RPMH_CE_CLK to make sure that this dtsi is compatible with the > other qcom ones. > > Cc: Thara Gopinath > Cc: Bjorn Andersson > Cc: Rob Herring > Cc: Andy Gross > Cc: Herbert Xu > Cc: David S. Miller > Cc: Stephen Boyd > Cc: Michael Turquette > Cc: Vinod Koul > Cc: dmaengine@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: bhupesh.linux@gmail.com > Signed-off-by: Bhupesh Sharma Reviewed-by: Thara Gopinath Warm Regards Thara > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 0a86fe71a66d..2ec4be930fd6 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2316,7 +2316,7 @@ cryptobam: dma@1dc4000 { > compatible = "qcom,bam-v1.7.0"; > reg = <0 0x01dc4000 0 0x24000>; > interrupts = ; > - clocks = <&rpmhcc 15>; > + clocks = <&rpmhcc RPMH_CE_CLK>; > clock-names = "bam_clk"; > #dma-cells = <1>; > qcom,ee = <0>; > @@ -2332,7 +2332,7 @@ crypto: crypto@1dfa000 { > reg = <0 0x01dfa000 0 0x6000>; > clocks = <&gcc GCC_CE1_AHB_CLK>, > <&gcc GCC_CE1_AHB_CLK>, > - <&rpmhcc 15>; > + <&rpmhcc RPMH_CE_CLK>; > clock-names = "iface", "bus", "core"; > dmas = <&cryptobam 6>, <&cryptobam 7>; > dma-names = "rx", "tx"; >