Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1018883pxj; Fri, 21 May 2021 04:43:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzCQHuAbO0iD8gvYEQ78TH1XTLkEo2LBiuxC05rEmTl1BAWckh94n2LhCHn5/GsO+Wc2/RH X-Received: by 2002:a17:906:fccc:: with SMTP id qx12mr9902732ejb.21.1621597399255; Fri, 21 May 2021 04:43:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621597399; cv=none; d=google.com; s=arc-20160816; b=mj2UGyqZKAPIgBOUQwVZpoOkAwBrW1Bbq5z0Lw4xcD6hT7fL1AqUk6BZuwIFFWltZw L3aEtDfufCahggNxZy2fOmmGzU8FbPCp23kGHwxnHeKF+JNcpOoj61AP3kjBJjXluxgr JZHCXa6WSwRn2F4gzUErX30p8mMdUeK5K/sYeqBcB/PLFVIi+YdgcA/xipKMAQBm9Sqp PPXsl8iKSP+vwEVOY9I+m9hd+4rwUT9epgZuKi+tcPW+T6C85CjXMus2WP0bLNj6hKrQ 7EIKExcJlpEPACebAudq2bf0gkicSRPkn7qUrgDI0GvtI9HzDEc1YLcTx3dTTFEaOMTm ks4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=F7LCuw0jlcNSnBVWl7ZFCmpPP3PjPhTJt8etLTzmNww=; b=ANpkaYqcAFgU/RdguHaRriyUdQaMvCVet7Xe8thUcXzVIs50Yf5wIoL0zbYFie/wjf GjyQhH2OloGDBxPStbitvSkNG/EPyrZW1O9IJFGSsrETw5NgdZ2EEhglKCgRJj4wEqb5 FWBMY9PmLD+RrE9GgE4x+XrkPF2RvHuwwI1teCsLjHhG5Qn4KpcRFmUnkXszO5fRy+RY Y4PeqFF6eevu9qMyHfbJupUIqddi7JMxtQBmgcWUqF5LLVRA78VZyRA0IcvUt3nEFsnw XUQdI/UGGaakDgI00Uzh1f59aixOWzSzobFCd8W34dvGi25d/tbH1W8I3nep7ABsPidB M6/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z22si5231774eja.705.2021.05.21.04.42.55; Fri, 21 May 2021 04:43:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232284AbhEUKHN (ORCPT + 99 others); Fri, 21 May 2021 06:07:13 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3617 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229704AbhEUKHM (ORCPT ); Fri, 21 May 2021 06:07:12 -0400 Received: from dggems701-chm.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Fmhwm3d2RzQqbt; Fri, 21 May 2021 18:02:16 +0800 (CST) Received: from dggpeml500012.china.huawei.com (7.185.36.15) by dggems701-chm.china.huawei.com (10.3.19.178) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Fri, 21 May 2021 18:05:48 +0800 Received: from huawei.com (10.67.165.24) by dggpeml500012.china.huawei.com (7.185.36.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Fri, 21 May 2021 18:05:48 +0800 From: Kai Ye To: CC: , , , Subject: [PATCH v2 1/2] crypto: hisilicon/qm - add dfx log if not use hardware crypto algs Date: Fri, 21 May 2021 18:02:43 +0800 Message-ID: <1621591364-46526-2-git-send-email-yekai13@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1621591364-46526-1-git-send-email-yekai13@huawei.com> References: <1621591364-46526-1-git-send-email-yekai13@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpeml500012.china.huawei.com (7.185.36.15) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Add print information necessary if not use hardware crypto algs. Signed-off-by: Kai Ye --- drivers/crypto/hisilicon/qm.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 8f7ea50..deb104e 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -4252,11 +4252,14 @@ static void hisi_qm_controller_reset(struct work_struct *rst_work) */ int hisi_qm_alg_register(struct hisi_qm *qm, struct hisi_qm_list *qm_list) { + struct device *dev = &qm->pdev->dev; int flag = 0; int ret = 0; - /* HW V2 not support both use uacce sva mode and hardware crypto algs */ - if (qm->ver <= QM_HW_V2 && qm->use_sva) + + if (qm->ver <= QM_HW_V2 && qm->use_sva) { + dev_info(dev, "HW V2 not both use uacce sva mode and hardware crypto algs.\n"); return 0; + } mutex_lock(&qm_list->lock); if (list_empty(&qm_list->list)) -- 2.8.1