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Date:   Thu, 3 Jun 2021 20:30:47 +0800
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Srujana Challa <schalla@marvell.com>
Cc:     davem@davemloft.net, linux-crypto@vger.kernel.org,
        arno@natisbad.org, bbrezillon@kernel.org, jerinj@marvell.com
Subject: Re: [PATCH 0/4] Add support for Marvell CN10K CPT block
Message-ID: <20210603123047.GF6161@gondor.apana.org.au>
References: <20210525112718.18288-1-schalla@marvell.com>
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On Tue, May 25, 2021 at 04:57:14PM +0530, Srujana Challa wrote:
> The current CPT driver supports OcteonTX2 silicon variants.
> The same OcteonTX2 Resource Virtualization Unit(RVU) is
> carried forward to the next-gen silicon ie OcteonTX3(CN10K),
> with some changes and feature enhancements.
> 
> This patch series adds support for CN10K silicon.
> 
> Srujana Challa (4):
>   crypto: octeontx2: Add mailbox support for CN10K
>   crypto: octeontx2: add support to map LMTST region for CN10K
>   crypto: octeontx2: add support for CPT operations on CN10K
>   crypto: octeontx2: enable and handle ME interrupts
> 
>  drivers/crypto/marvell/octeontx2/Makefile     |  13 +-
>  drivers/crypto/marvell/octeontx2/cn10k_cpt.c  |  93 ++++++++++
>  drivers/crypto/marvell/octeontx2/cn10k_cpt.h  |  36 ++++
>  .../marvell/octeontx2/otx2_cpt_common.h       |  23 +++
>  .../marvell/octeontx2/otx2_cpt_hw_types.h     |  16 +-
>  drivers/crypto/marvell/octeontx2/otx2_cptlf.c |   9 +-
>  drivers/crypto/marvell/octeontx2/otx2_cptlf.h |  10 ++
>  drivers/crypto/marvell/octeontx2/otx2_cptpf.h |   1 +
>  .../marvell/octeontx2/otx2_cptpf_main.c       | 160 +++++++++++++-----
>  .../marvell/octeontx2/otx2_cptpf_ucode.c      |  32 +++-
>  .../marvell/octeontx2/otx2_cptpf_ucode.h      |   8 +-
>  drivers/crypto/marvell/octeontx2/otx2_cptvf.h |   3 +
>  .../marvell/octeontx2/otx2_cptvf_main.c       |  49 ++++--
>  .../marvell/octeontx2/otx2_cptvf_mbox.c       |  43 +++++
>  .../marvell/octeontx2/otx2_cptvf_reqmgr.c     |  17 +-
>  15 files changed, 438 insertions(+), 75 deletions(-)
>  create mode 100644 drivers/crypto/marvell/octeontx2/cn10k_cpt.c
>  create mode 100644 drivers/crypto/marvell/octeontx2/cn10k_cpt.h

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt