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Date:   Thu, 12 Aug 2021 19:36:48 +0800
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Weili Qian <qianweili@huawei.com>
Cc:     davem@davemloft.net, linux-kernel@vger.kernel.org,
        linux-crypto@vger.kernel.org, wangzhou1@hisilicon.com,
        liulongfang@huawei.com
Subject: Re: [PATCH 0/3] crypto: hisilicon - enable clock gating for
 accelerator device
Message-ID: <20210812113648.GE561@gondor.apana.org.au>
References: <1628317751-3396-1-git-send-email-qianweili@huawei.com>
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On Sat, Aug 07, 2021 at 02:29:08PM +0800, Weili Qian wrote:
> Kunpeng930 accelerator devices support dynamic clock gating. This patchset
> enables clock gating for accelerator devices by writing hardware registers.
> 
> Weili Qian (3):
>   crypto: hisilicon - enable zip device clock gating
>   crypto: hisilicon - enable sec device clock gating
>   crypto: hisilicon - enable hpre device clock gating
> 
>  drivers/crypto/hisilicon/hpre/hpre_main.c | 63 +++++++++++++++++++++++++++++++
>  drivers/crypto/hisilicon/sec2/sec_main.c  | 46 +++++++++++++++++++---
>  drivers/crypto/hisilicon/zip/zip_main.c   | 26 +++++++++++++
>  3 files changed, 130 insertions(+), 5 deletions(-)

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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