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[62.248.207.242]) by smtp.gmail.com with ESMTPSA id b4sm30366lft.206.2021.10.13.12.23.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Oct 2021 12:23:26 -0700 (PDT) Subject: Re: [PATCH v4 16/20] crypto: qce: core: Make clocks optional To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org Cc: bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, Thara Gopinath References: <20211013105541.68045-1-bhupesh.sharma@linaro.org> <20211013105541.68045-17-bhupesh.sharma@linaro.org> From: Vladimir Zapolskiy Message-ID: <5f69019a-86c7-fac5-2758-1be9a9092678@linaro.org> Date: Wed, 13 Oct 2021 22:23:26 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: <20211013105541.68045-17-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Hi Bhupesh, On 10/13/21 1:55 PM, Bhupesh Sharma wrote: > From: Thara Gopinath > > On certain Snapdragon processors, the crypto engine clocks are enabled by > default by security firmware and the driver need not/ should not handle the > clocks. Make acquiring of all the clocks optional in crypto enginer driver typo, s/enginer/engine/ > so that the driver intializes properly even if no clocks are specified in typo, s/intializes/initializes/ > the dt. > > Signed-off-by: Thara Gopinath > --- > drivers/crypto/qce/core.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c > index 2ab0b97d718c..576c416461f9 100644 > --- a/drivers/crypto/qce/core.c > +++ b/drivers/crypto/qce/core.c > @@ -213,19 +213,19 @@ static int qce_crypto_probe(struct platform_device *pdev) > if (IS_ERR(qce->mem_path)) > return PTR_ERR(qce->mem_path); > > - qce->core = devm_clk_get(qce->dev, "core"); > + qce->core = devm_clk_get_optional(qce->dev, "core"); > if (IS_ERR(qce->core)) { > ret = PTR_ERR(qce->core); > goto err_mem_path_put; > } > > - qce->iface = devm_clk_get(qce->dev, "iface"); > + qce->iface = devm_clk_get_optional(qce->dev, "iface"); > if (IS_ERR(qce->iface)) { > ret = PTR_ERR(qce->iface); > goto err_mem_path_put; > } > > - qce->bus = devm_clk_get(qce->dev, "bus"); > + qce->bus = devm_clk_get_optional(qce->dev, "bus"); > if (IS_ERR(qce->bus)) { > ret = PTR_ERR(qce->bus); > goto err_mem_path_put; > -- Best wishes, Vladimir