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References: <20211217093325.30612-1-conor.dooley@microchip.com> <20211217093325.30612-14-conor.dooley@microchip.com>
In-Reply-To: <20211217093325.30612-14-conor.dooley@microchip.com>
From:   Geert Uytterhoeven <geert@linux-m68k.org>
Date:   Fri, 17 Dec 2021 14:40:28 +0100
Message-ID: <CAMuHMdUYUEpU4bFobK=fpVDGzwAHQWJ=dvPVmp20DUTLSe+DRw@mail.gmail.com>
Subject: Re: [PATCH v2 13/17] riscv: dts: microchip: use hart and clk defines
 for icicle kit
To:     Conor Dooley <conor.dooley@microchip.com>
Cc:     Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <bgolaszewski@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Jassi Brar <jassisinghbrar@gmail.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Alessandro Zummo <a.zummo@towertech.it>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Mark Brown <broonie@kernel.org>,
        Greg KH <gregkh@linuxfoundation.org>,
        Thierry Reding <thierry.reding@gmail.com>,
        =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>, Lee Jones <lee.jones@linaro.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linux I2C <linux-i2c@vger.kernel.org>,
        Linux PWM List <linux-pwm@vger.kernel.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
        linux-rtc@vger.kernel.org, linux-spi <linux-spi@vger.kernel.org>,
        USB list <linux-usb@vger.kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
        Bin Meng <bin.meng@windriver.com>,
        Heiko Stuebner <heiko@sntech.de>,
        Lewis Hanly <lewis.hanly@microchip.com>,
        daire.mcnamara@microchip.com, ivan.griffin@microchip.com,
        Atish Patra <atish.patra@wdc.com>
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Hi Conor,

Thanks for your patch!

On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley@microchip.com> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Update the Microchip Icicle kit device tree by replacing interrupt and
> clock related magic numbers with their defined counterparts.

Usually we make a distinction between (a) numbers that can be looked
up easily in a datasheet, and (b) numbers that were made up because
we needed some mapping. Of course both types of numbers are fixed,
and cannot be changed.

For (a), we tend to use the hardcoded numbers in the DTS files, to
avoid reviewers having to go through another layer of indirection
(i.e. does the number for the define match the number in the
datasheet?).
For (b), we use the defines, as there is no other official place to
look up the numbers.

> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -2,6 +2,8 @@
>  /* Copyright (c) 2020 Microchip Technology Inc */
>
>  /dts-v1/;
> +#include "dt-bindings/clock/microchip,mpfs-clock.h"

The clock numbers we're made-up, so they fall under (b).

> +#include "dt-bindings/interrupt-controller/riscv-hart.h"

I believe these are just the official CLIC interrupt IDs, so they
fall under (a)?

> @@ -165,11 +167,16 @@ cache-controller@2010000 {
>                 clint@2000000 {
>                         compatible = "sifive,fu540-c000-clint", "sifive,clint0";
>                         reg = <0x0 0x2000000 0x0 0xC000>;
> -                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
> -                                             <&cpu1_intc 3>, <&cpu1_intc 7>,
> -                                             <&cpu2_intc 3>, <&cpu2_intc 7>,
> -                                             <&cpu3_intc 3>, <&cpu3_intc 7>,
> -                                             <&cpu4_intc 3>, <&cpu4_intc 7>;
> +                       interrupts-extended = <&cpu0_intc HART_INT_M_SOFT>,
> +                                             <&cpu0_intc HART_INT_M_TIMER>,
> +                                             <&cpu1_intc HART_INT_M_SOFT>,
> +                                             <&cpu1_intc HART_INT_M_TIMER>,
> +                                             <&cpu2_intc HART_INT_M_SOFT>,
> +                                             <&cpu2_intc HART_INT_M_TIMER>,
> +                                             <&cpu3_intc HART_INT_M_SOFT>,
> +                                             <&cpu3_intc HART_INT_M_TIMER>,
> +                                             <&cpu4_intc HART_INT_M_SOFT>,
> +                                             <&cpu4_intc HART_INT_M_TIMER>;

Hence I'm not sure we want changes like this?

>                 };
>
>                 plic: interrupt-controller@c000000 {
         };
>
> @@ -210,7 +221,7 @@ serial0: serial@20000000 {
>                         interrupt-parent = <&plic>;
>                         interrupts = <90>;
>                         current-speed = <115200>;
> -                       clocks = <&clkcfg 8>;
> +                       clocks = <&clkcfg CLK_MMUART0>;

But this change is fine.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds