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Mon, 20 Dec 2021 08:05:13 +0000 From: To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip mpfs spi Thread-Topic: [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip mpfs spi Thread-Index: AQHX8ykv6sbPo1+d0UqqLmeeX2B3NKw2iOgAgAAHFACAAABvgIAEemoA Date: Mon, 20 Dec 2021 08:05:13 +0000 Message-ID: <2981d13d-13c7-f455-722e-778fb07f170f@microchip.com> References: <20211217093325.30612-1-conor.dooley@microchip.com> <20211217093325.30612-11-conor.dooley@microchip.com> <606633c8-6cd6-af3a-4d6a-bb3058a64026@microchip.com> In-Reply-To: Accept-Language: en-IE, en-US Content-Language: en-IE X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=microchip.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8ea58834-ac3c-463a-7c6c-08d9c38f7354 x-ms-traffictypediagnostic: MW3PR11MB4634:EE_ x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:741; 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charset="Windows-1252" Content-ID: <4719C4EB9F0F6741A01BFF335C8421B5@namprd11.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO1PR11MB5154.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8ea58834-ac3c-463a-7c6c-08d9c38f7354 X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Dec 2021 08:05:13.0886 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 16SjlWGnaSDKE6kgLOsZLyD145gznsFZvjHMH92lODt08IYgDdGm3P1nBhZiAGXBzLROVlxRricbce/ghNh0bIi1etoqC0U8vlVA2vDRMRs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR11MB4634 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 17/12/2021 11:43, Mark Brown wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you=20 know the content is safe > > On Fri, Dec 17, 2021 at 11:40:29AM +0000, Conor.Dooley@microchip.com=20 wrote: >> On 17/12/2021 11:17, Mark Brown wrote: >>> Why do you need this property in the DT - isn't the number of chip >>> selects in the IP a fixes property? >> >> Nope! It's an IP that's intended for use in FPGAs so the number of >> selects may (and does) vary based on implementation. > > That doesn't explain why the number is needed in the binding - why do > you need this property in the DT? Took another look at the IP core configuration & I think you're right=20 and that property can be dropped. The register responsible for CS=20 control will not be optimised away even if the CS is not used & the=20 worst outcome is that nothing will happen.