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Thu, 23 Dec 2021 09:36:23 -0800 (PST) Received: from localhost ([12.163.77.120]) by smtp.gmail.com with ESMTPSA id g6sm7407727pfj.156.2021.12.23.09.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Dec 2021 09:36:23 -0800 (PST) Date: Thu, 23 Dec 2021 09:36:23 -0800 (PST) X-Google-Original-Date: Thu, 23 Dec 2021 09:36:07 PST (-0800) Subject: Re: [PATCH v2 17/17] MAINTAINERS: update riscv/microchip entry In-Reply-To: <05d6a273-19f6-2147-75ba-1fff726a0f70@microchip.com> CC: krzysztof.kozlowski@canonical.com, linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, jassisinghbrar@gmail.com, Paul Walmsley , aou@eecs.berkeley.edu, a.zummo@towertech.it, alexandre.belloni@bootlin.com, broonie@kernel.org, Greg KH , thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-crypto@vger.kernel.org, linux-rtc@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org, geert@linux-m68k.org, bin.meng@windriver.com, heiko@sntech.de, Lewis.Hanly@microchip.com, Daire.McNamara@microchip.com, Ivan.Griffin@microchip.com, Atish Patra From: Palmer Dabbelt To: Conor.Dooley@microchip.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Thu, 23 Dec 2021 06:56:45 PST (-0800), Conor.Dooley@microchip.com wrote: > On 17/12/2021 15:09, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 17/12/2021 10:33, conor.dooley@microchip.com wrote: >>> From: Conor Dooley >>> >>> Update the RISC-V/Microchip entry by adding the microchip dts >>> directory and myself as maintainer >>> >>> Signed-off-by: Conor Dooley >>> --- >>> MAINTAINERS | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/MAINTAINERS b/MAINTAINERS >>> index 7a2345ce8521..3b1d6be7bd56 100644 >>> --- a/MAINTAINERS >>> +++ b/MAINTAINERS >>> @@ -16348,8 +16348,10 @@ K: riscv >>> >>> RISC-V/MICROCHIP POLARFIRE SOC SUPPORT >>> M: Lewis Hanly >>> +M: Conor Dooley >>> L: linux-riscv@lists.infradead.org >>> S: Supported >>> +F: arch/riscv/boot/dts/microchip/ >>> F: drivers/mailbox/mailbox-mpfs.c >>> F: drivers/soc/microchip/ >>> F: include/soc/microchip/mpfs.h >>> >> >> Good to have the DTS covered, so FWIW: >> Acked-by: Krzysztof Kozlowski >> >> You still should get Lewis' ack (unless he merges it) > Aye, it'll be an ack. We don't currently have a tree & would rather do > this via risc-v than the at91/sam arm soc tree. WFM. I'll be awaiting the ack. I don't see any fundamental issues from my end, as long is it's got all the acks/reviews then I'm generally fine with this sort of stuff. I'll take a look before merging it, I'm kind of buried right now. Sorry! >> >> Best regards, >> Krzysztof >> >