Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <f932019c-f83c-3847-b70b-fa7eb57662de@intel.com>
Date:   Tue, 1 Feb 2022 08:42:10 -0800
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.5.1
Subject: Re: [RFC V2 0/5] Introduce AVX512 optimized crypto algorithms
Content-Language: en-US
To:     Dave Hansen <dave.hansen@intel.com>,
        Andy Lutomirski <luto@kernel.org>
Cc:     Tony Luck <tony.luck@intel.com>,
        Asit K Mallick <asit.k.mallick@intel.com>,
        "H. Peter Anvin" <hpa@zytor.com>,
        Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        "David S. Miller" <davem@davemloft.net>,
        "Ravi V. Shankar" <ravi.v.shankar@intel.com>,
        "Chen, Tim C" <tim.c.chen@intel.com>,
        "Kleen, Andi" <andi.kleen@intel.com>, greg.b.tucker@intel.com,
        "Kasten, Robert A" <robert.a.kasten@intel.com>,
        rajendrakumar.chinnaiyan@intel.com, tomasz.kantecki@intel.com,
        ryan.d.saffores@intel.com, ilya.albrekht@intel.com,
        Kyung Min Park <kyung.min.park@intel.com>,
        Weiny Ira <ira.weiny@intel.com>,
        Eric Biggers <ebiggers@kernel.org>,
        Ard Biesheuvel <ardb@kernel.org>, X86 ML <x86@kernel.org>
References: <1611386920-28579-1-git-send-email-megha.dey@intel.com>
 <CALCETrU06cuvUF5NDSm8--dy3dOkxYQ88cGWaakOQUE4Vkz88w@mail.gmail.com>
 <3878af8d-ac1e-522a-7c9f-fda4a1f5b967@intel.com>
 <CALCETrUWgLwp6yfu9ODY1UYufHeAgsnOOCOAwXZQK6FJk_YdUA@mail.gmail.com>
 <e8ce1146-3952-6977-1d0e-a22758e58914@intel.com>
 <0a10e16b-df77-9a7f-6964-8dc3e114b30b@intel.com>
From:   "Dey, Megha" <megha.dey@intel.com>
In-Reply-To: <0a10e16b-df77-9a7f-6964-8dc3e114b30b@intel.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk

Hi Dave,

On 1/31/2022 11:18 AM, Dave Hansen wrote:
> On 1/31/22 10:43, Dey, Megha wrote:
>> With this implementation, we see a 1.5X improvement on ICX/ICL for 16KB
>> buffers compared to the existing kernel AES-GCM implementation that
>> works on 128-bit XMM registers.
> What is your best guess about how future-proof this implementation is?
>
> Will this be an ICL/ICX one-off?  Or, will implementations using 256-bit
> YMM registers continue to enjoy a frequency advantage over the 512-bit
> implementations for a long time?
This is not planned as ICL/ICX one-off.AVX512VL code using YMM registers 
is expected to have the same power license properties as AVX2 code which 
implies it would have a frequency advantage over the current AVX512 
implementation until we have new implementations of AVX512 instructions 
which do not have the frequency drop issue.