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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h4-20020a170906718400b006d6e74aadb4si2706443ejk.72.2022.03.04.01.05.00; Fri, 04 Mar 2022 01:05:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=hisilicon.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235478AbiCDJEU (ORCPT + 99 others); Fri, 4 Mar 2022 04:04:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231620AbiCDJES (ORCPT ); Fri, 4 Mar 2022 04:04:18 -0500 Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4ABAECEA0D; Fri, 4 Mar 2022 01:03:29 -0800 (PST) Received: from canpemm500005.china.huawei.com (unknown [172.30.72.53]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4K91x03kyvz1GCL3; Fri, 4 Mar 2022 16:58:44 +0800 (CST) Received: from [10.67.103.22] (10.67.103.22) by canpemm500005.china.huawei.com (7.192.104.229) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Fri, 4 Mar 2022 17:03:26 +0800 Message-ID: Date: Fri, 4 Mar 2022 17:03:20 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.2.1 Subject: Re: [PATCH v8 1/9] crypto: hisilicon/qm: Move the QM header to include/linux To: Shameer Kolothum , , , CC: , , , , , , , , , References: <20220303230131.2103-1-shameerali.kolothum.thodi@huawei.com> <20220303230131.2103-2-shameerali.kolothum.thodi@huawei.com> From: Zhou Wang In-Reply-To: <20220303230131.2103-2-shameerali.kolothum.thodi@huawei.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.103.22] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To canpemm500005.china.huawei.com (7.192.104.229) X-CFilter-Loop: Reflected X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org > Since we are going to introduce VFIO PCI HiSilicon ACC driver for live > migration in subsequent patches, move the ACC QM header file to a > common include dir. > > Signed-off-by: Shameer Kolothum Hi Shameer, It looks good to me for this movement. Acked-by: Zhou Wang Thanks, Zhou > --- > drivers/crypto/hisilicon/hpre/hpre.h | 2 +- > drivers/crypto/hisilicon/qm.c | 2 +- > drivers/crypto/hisilicon/sec2/sec.h | 2 +- > drivers/crypto/hisilicon/sgl.c | 2 +- > drivers/crypto/hisilicon/zip/zip.h | 2 +- > drivers/crypto/hisilicon/qm.h => include/linux/hisi_acc_qm.h | 0 > 6 files changed, 5 insertions(+), 5 deletions(-) > rename drivers/crypto/hisilicon/qm.h => include/linux/hisi_acc_qm.h (100%) > > diff --git a/drivers/crypto/hisilicon/hpre/hpre.h b/drivers/crypto/hisilicon/hpre/hpre.h > index e0b4a1982ee9..9a0558ed82f9 100644 > --- a/drivers/crypto/hisilicon/hpre/hpre.h > +++ b/drivers/crypto/hisilicon/hpre/hpre.h > @@ -4,7 +4,7 @@ > #define __HISI_HPRE_H > > #include > -#include "../qm.h" > +#include > > #define HPRE_SQE_SIZE sizeof(struct hpre_sqe) > #define HPRE_PF_DEF_Q_NUM 64 > diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c > index c5b84a5ea350..ed23e1d3fa27 100644 > --- a/drivers/crypto/hisilicon/qm.c > +++ b/drivers/crypto/hisilicon/qm.c > @@ -15,7 +15,7 @@ > #include > #include > #include > -#include "qm.h" > +#include > > /* eq/aeq irq enable */ > #define QM_VF_AEQ_INT_SOURCE 0x0 > diff --git a/drivers/crypto/hisilicon/sec2/sec.h b/drivers/crypto/hisilicon/sec2/sec.h > index d97cf02b1df7..c2e9b01187a7 100644 > --- a/drivers/crypto/hisilicon/sec2/sec.h > +++ b/drivers/crypto/hisilicon/sec2/sec.h > @@ -4,7 +4,7 @@ > #ifndef __HISI_SEC_V2_H > #define __HISI_SEC_V2_H > > -#include "../qm.h" > +#include > #include "sec_crypto.h" > > /* Algorithm resource per hardware SEC queue */ > diff --git a/drivers/crypto/hisilicon/sgl.c b/drivers/crypto/hisilicon/sgl.c > index 057273769f26..f7efc02b065f 100644 > --- a/drivers/crypto/hisilicon/sgl.c > +++ b/drivers/crypto/hisilicon/sgl.c > @@ -1,9 +1,9 @@ > // SPDX-License-Identifier: GPL-2.0 > /* Copyright (c) 2019 HiSilicon Limited. */ > #include > +#include > #include > #include > -#include "qm.h" > > #define HISI_ACC_SGL_SGE_NR_MIN 1 > #define HISI_ACC_SGL_NR_MAX 256 > diff --git a/drivers/crypto/hisilicon/zip/zip.h b/drivers/crypto/hisilicon/zip/zip.h > index 517fdbdff3ea..3dfd3bac5a33 100644 > --- a/drivers/crypto/hisilicon/zip/zip.h > +++ b/drivers/crypto/hisilicon/zip/zip.h > @@ -7,7 +7,7 @@ > #define pr_fmt(fmt) "hisi_zip: " fmt > > #include > -#include "../qm.h" > +#include > > enum hisi_zip_error_type { > /* negative compression */ > diff --git a/drivers/crypto/hisilicon/qm.h b/include/linux/hisi_acc_qm.h > similarity index 100% > rename from drivers/crypto/hisilicon/qm.h > rename to include/linux/hisi_acc_qm.h >