Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp2408975iob; Sat, 30 Apr 2022 07:50:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwHlIZeTYS9pgqNjhHhS80M9sF2xEqeDh0HgdVAj3v1CVMbJmQsYiAjyayw8lpwhooPzPmd X-Received: by 2002:a05:6512:2009:b0:471:ffee:6ee1 with SMTP id a9-20020a056512200900b00471ffee6ee1mr3152356lfb.268.1651330203954; Sat, 30 Apr 2022 07:50:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1651330203; cv=none; d=google.com; s=arc-20160816; b=FJVkt4os53hA0ugzdGOAs5CtmI4sSVCFhsdSPPNAB4ipDn5/TlpzjV9MCaVDJPX3Is L4buIWzdZA0d016uO3RDe9dZnA7VieCscPJfCCz/Wo/k1OVeB1mj6aCZr5Vkm1CoA0pS mLWcJcpo/wn1/Ufj9/YbaJYbBo6XKU00TbpAEJYlhyQIFvC9WEwQRblfVi3z7/W3eJAZ 7LFC8gXHs/kGoWejgYhF+MoqWX9Dacl/IRvnNsiIs2FTE2ulRXAZq9loFyMkLAmsPJ6K YRuHxHfB5VBNuO0R5ksnb+6VpUmK+VWPa/WbcV2fhwWoZkz0u2xeWRgZ/MjeyKTY3x79 pUUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=19JFfsHR6Tp7LcmMWZO8uINflblFf+OX3ZdrXJdqqB8=; b=AG1jrC7rb2so4t6vY8Sh/alf226kd3O8Rqqb8G0hYVxsw5bcbEyBBBCI5derI72GWK Tu6KuYfhinT+rChyUKZ49E3zTMLEFMVz1fsbjwy1QiRiIgyJYbBKsTvBSOtfkyzPO1db 8FR1T1mLEXbwnwrpytufACSwLg0agKq+AflwiBJdttKhuHwz7KuJVmx8I6I8tFHRxp+f cEU5njYTP4uuS8AKbR2JeTNz/R95q5xClBoPFxODAOjOyuOBjA7zIFqoUtyYwu0GPKBm 58DAvGGdm6kaTXcDNlJRUlneRIRpFawmTdU5VqCDU4qEf0hEWUi/5dySIDVZeJcTITYz b4aQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@zx2c4.com header.s=20210105 header.b=SHh4hRgR; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=zx2c4.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z26-20020a056512371a00b004721bb00e51si8634525lfr.330.2022.04.30.07.49.18; Sat, 30 Apr 2022 07:50:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@zx2c4.com header.s=20210105 header.b=SHh4hRgR; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=zx2c4.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238809AbiD3BdG (ORCPT + 99 others); Fri, 29 Apr 2022 21:33:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238172AbiD3BdG (ORCPT ); Fri, 29 Apr 2022 21:33:06 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D3247F20D; Fri, 29 Apr 2022 18:29:45 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5C82CB83843; Sat, 30 Apr 2022 01:29:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7506CC385A7; Sat, 30 Apr 2022 01:29:42 +0000 (UTC) Authentication-Results: smtp.kernel.org; dkim=pass (1024-bit key) header.d=zx2c4.com header.i=@zx2c4.com header.b="SHh4hRgR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zx2c4.com; s=20210105; t=1651282179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=19JFfsHR6Tp7LcmMWZO8uINflblFf+OX3ZdrXJdqqB8=; b=SHh4hRgRP6EmLV+d8Xh1tNidnOnYrtcCnOmHoYFbdpuSemy3C8S1fPMV/ldzuGyhATS2wt QX3TUz29I6uiMgr043x0w9kboiVIsCRg4ugDiT1Se1IbNG39pJskGd7b8tMTbSsIetB1ML LgG5Mvoy+gMISDKnoQMhrH+LLo88UhI= Received: by mail.zx2c4.com (ZX2C4 Mail Server) with ESMTPSA id 8034c9c3 (TLSv1.3:AEAD-AES256-GCM-SHA384:256:NO); Sat, 30 Apr 2022 01:29:39 +0000 (UTC) Date: Sat, 30 Apr 2022 03:29:37 +0200 From: "Jason A. Donenfeld" To: Stafford Horne Cc: linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org Subject: Re: [PATCH v7 11/17] openrisc: account for 0 starting value in random_get_entropy() Message-ID: References: <20220423212623.1957011-12-Jason@zx2c4.com> <20220429001648.1671472-1-Jason@zx2c4.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Hi Stafford, On Sat, Apr 30, 2022 at 10:19:03AM +0900, Stafford Horne wrote: > Hi Jason, > > On Fri, Apr 29, 2022 at 02:16:48AM +0200, Jason A. Donenfeld wrote: > > As a sanity check, this series makes sure that during early boot, the > > cycle counter isn't returning all zeros. However, OpenRISC's TTCR timer > > can be rather slow and starts out as zero during stages of early boot. > > We know it works, however. So just always add 1 to random_get_entropy() > > so that it doesn't trigger these checks. > > Just one nit, you might want to qualify that this is related to simulators/qemu: > * "However, in simulators OpenRISC's TTCR timer can be rather slow..." Nice catch, will do. Jason > > > Cc: Thomas Gleixner > > Cc: Arnd Bergmann > > Cc: Jonas Bonn > > Cc: Stefan Kristiansson > > Acked-by: Stafford Horne > > Signed-off-by: Jason A. Donenfeld > > --- > > Changes v6->v7: > > - Add 1 to cycle counter to account for functional but slow-to-begin > > counter on QEMU. > > > > arch/openrisc/include/asm/timex.h | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/arch/openrisc/include/asm/timex.h b/arch/openrisc/include/asm/timex.h > > index d52b4e536e3f..a78a5807c927 100644 > > --- a/arch/openrisc/include/asm/timex.h > > +++ b/arch/openrisc/include/asm/timex.h > > @@ -23,6 +23,9 @@ static inline cycles_t get_cycles(void) > > { > > return mfspr(SPR_TTCR); > > } > > +#define get_cycles get_cycles > > + > > +#define random_get_entropy() ((unsigned long)get_cycles() + 1) > > > > /* This isn't really used any more */ > > #define CLOCK_TICK_RATE 1000 > > Thanks, > > -Stafford