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Mon, 20 Jun 2022 18:09:34 -0500 From: Ashish Kalra To: , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH Part2 v6 30/49] KVM: x86/mmu: Introduce kvm_mmu_map_tdp_page() for use by TDX and SNP Date: Mon, 20 Jun 2022 23:09:20 +0000 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cb8b2099-c262-482a-d2d9-08da5311f20b X-MS-TrafficTypeDiagnostic: MW2PR12MB2412:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: LQ7jshNKgzy0rR/fj7dczFK8u+sVIf6UnDiYSXWaWcAYCQ/ASIyJeEtFttxmeXWQAad+pXbn0dYGpJVnxfu0oAz4rYwCPCl81fZwZMogrXyN9S/qxoYoLw+VVbLxUNJVLdJFFu7dnLWAXRFWAGYqFHQrIDsGSp3KYL1KboIQr3GTnz+dLt9RooyCUuqKXXLLYxIHpMD/NrpNizVD27jxpXjyENi017RLU4RaEkdP5BmxKDY97eJ9paNj4MMA+d3yPNWjOrTjFqaxi3m5qOxCCGywGW9E3Uksq01i5ABqGF1EgFA1JbsdvFcU+EifW7qLDt9+tkffxpolPziQVZKxs4kzjrUhFvCAatYEHvlyWBqWmjW7ql8DqmjONWv7sxRFCOOL7yGju33AFmuNrgasyuugPEeaSXskc3vBrW8yT9gkBfwOl4CtciURsACOkfJBUh9mnbGMpyW/19b6QelnBZbVG8iNUz5HNXA2rZwa+fFjM3yeCdsGvUKJXLDeeRaw+UjNHGqLPvjtCrzw+UZmOE6SxCB0gLnaof7+DUksxSVjRPSc12HchSsdEM/2RCXrVpbJlXwH1USoD5tx7CyMdEtl6gjY0EiIN6RxA6iJVqYFPCz1uPzcn6ux1YaSfh8y2pTK5KKTSIXqnzcqU3KxIQTK+JdqNfhnBAn9vryKi5sfIMHk1QaUImQ+EBi26pfILIydGw8Os0Mo1RW62mOme++VVDPBFhTf+BkYwgQmPVkWnsE3giXv0TAYN8uDh5v+1sMYfHYqHYm30C7jGJGVVg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(346002)(376002)(136003)(396003)(40470700004)(36840700001)(46966006)(8936002)(5660300002)(7416002)(478600001)(83380400001)(7406005)(16526019)(186003)(40460700003)(2616005)(40480700001)(26005)(7696005)(41300700001)(86362001)(110136005)(426003)(47076005)(356005)(54906003)(81166007)(6666004)(2906002)(336012)(8676002)(4326008)(316002)(82740400003)(82310400005)(36860700001)(36756003)(70206006)(70586007)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2022 23:09:36.5819 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb8b2099-c262-482a-d2d9-08da5311f20b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT053.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2412 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Sean Christopherson Introduce a helper to directly (pun intended) fault-in a TDP page without having to go through the full page fault path. This allows TDX to get the resulting pfn and also allows the RET_PF_* enums to stay in mmu.c where they belong. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata Signed-off-by: Brijesh Singh --- arch/x86/kvm/mmu.h | 3 +++ arch/x86/kvm/mmu/mmu.c | 51 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index e6cae6f22683..c99b15e97a0a 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -204,6 +204,9 @@ static inline int kvm_mmu_do_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, return vcpu->arch.mmu->page_fault(vcpu, &fault); } +kvm_pfn_t kvm_mmu_map_tdp_page(struct kvm_vcpu *vcpu, gpa_t gpa, + u32 error_code, int max_level); + /* * Check if a given access (described through the I/D, W/R and U/S bits of a * page fault error code pfec) causes a permission fault with the given PTE diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 997318ecebd1..569021af349a 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4100,6 +4100,57 @@ int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) return direct_page_fault(vcpu, fault); } +kvm_pfn_t kvm_mmu_map_tdp_page(struct kvm_vcpu *vcpu, gpa_t gpa, + u32 err, int max_level) +{ + struct kvm_page_fault fault = { + .addr = gpa, + .error_code = err, + .exec = err & PFERR_FETCH_MASK, + .write = err & PFERR_WRITE_MASK, + .present = err & PFERR_PRESENT_MASK, + .rsvd = err & PFERR_RSVD_MASK, + .user = err & PFERR_USER_MASK, + .prefetch = false, + .is_tdp = likely(vcpu->arch.mmu->page_fault == kvm_tdp_page_fault), + .nx_huge_page_workaround_enabled = is_nx_huge_page_enabled(), + + .max_level = max_level, + .req_level = PG_LEVEL_4K, + .goal_level = PG_LEVEL_4K, + }; + int r; + + if (mmu_topup_memory_caches(vcpu, false)) + return KVM_PFN_ERR_FAULT; + + /* + * Loop on the page fault path to handle the case where an mmu_notifier + * invalidation triggers RET_PF_RETRY. In the normal page fault path, + * KVM needs to resume the guest in case the invalidation changed any + * of the page fault properties, i.e. the gpa or error code. For this + * path, the gpa and error code are fixed by the caller, and the caller + * expects failure if and only if the page fault can't be fixed. + */ + do { + /* + * TODO: this should probably go through kvm_mmu_do_page_fault(), + * but we need a way to control the max_level, so maybe a direct + * call to kvm_tdp_page_fault, which will call into + * direct_page_fault() when appropriate. + */ + //r = direct_page_fault(vcpu, &fault); +#if CONFIG_RETPOLINE + if (fault.is_tdp) + r = kvm_tdp_page_fault(vcpu, &fault); +#else + r = vcpu->arch.mmu->page_fault(vcpu, &fault); +#endif + } while (r == RET_PF_RETRY && !is_error_noslot_pfn(fault.pfn)); + return fault.pfn; +} +EXPORT_SYMBOL_GPL(kvm_mmu_map_tdp_page); + static void nonpaging_init_context(struct kvm_mmu *context) { context->page_fault = nonpaging_page_fault; -- 2.25.1