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Date:   Tue, 28 Jun 2022 12:03:38 -0700
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Subject: Re: [PATCH Part2 v6 06/49] x86/sev: Add helper functions for
 RMPUPDATE and PSMASH instruction
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To:     "Kalra, Ashish" <Ashish.Kalra@amd.com>,
        "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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From:   Dave Hansen <dave.hansen@intel.com>
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On 6/28/22 10:57, Kalra, Ashish wrote:
> +       /*
> +        * RMP table entry format is not architectural and it can vary by processor and
> +        * is defined by the per-processor PPR. Restrict SNP support on the known CPU
> +        * model and family for which the RMP table entry format is currently defined for.
> +        */
> +       if (family != 0x19 || model > 0xaf)
> +               goto nosnp;
> +
> 
> This way SNP will only be enabled specifically on the platforms for which this RMP entry
> format is defined in those processor's PPR. This will work for Milan and Genoa as of now.

At some point, it would be really nice if the AMD side of things could
work to kick the magic number habit on these things.  This:

	arch/x86/include/asm/intel-family.h

has been really handy.  It lets you do things like

	grep INTEL_FAM6_SKYLAKE arch/x86

That's a *LOT* more precise than:

	egrep -i '0x5E|94' arch/x86