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To:     Taehee Yoo <ap420073@gmail.com>,
        "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
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Subject: RE: [PATCH 2/3] crypto: aria-avx: add AES-NI/AVX/x86_64 assembler
 implementation of aria cipher
Thread-Topic: [PATCH 2/3] crypto: aria-avx: add AES-NI/AVX/x86_64 assembler
 implementation of aria cipher
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Date:   Wed, 24 Aug 2022 19:35:27 +0000
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> -----Original Message-----
> From: Taehee Yoo <ap420073@gmail.com>
> Sent: Wednesday, August 24, 2022 10:59 AM
> Subject: [PATCH 2/3] crypto: aria-avx: add AES-NI/AVX/x86_64 assembler
> implementation of aria cipher
>=20
...

> +#include "ecb_cbc_helpers.h"
> +
> +asmlinkage void aria_aesni_avx_crypt_16way(const u32 *rk, u8 *dst,
> +					  const u8 *src, int rounds);
> +
> +static int ecb_do_encrypt(struct skcipher_request *req, const u32 *rkey)
> +{
> +	struct aria_ctx *ctx =3D
> crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
> +	struct skcipher_walk walk;
> +	unsigned int nbytes;
> +	int err;
> +
> +	err =3D skcipher_walk_virt(&walk, req, false);
> +
> +	while ((nbytes =3D walk.nbytes) > 0) {
> +		const u8 *src =3D walk.src.virt.addr;
> +		u8 *dst =3D walk.dst.virt.addr;
> +
> +		kernel_fpu_begin();
> +		while (nbytes >=3D ARIA_AVX_BLOCK_SIZE) {
> +			aria_aesni_avx_crypt_16way(rkey, dst, src, ctx->rounds);
> +			dst +=3D ARIA_AVX_BLOCK_SIZE;
> +			src +=3D ARIA_AVX_BLOCK_SIZE;
> +			nbytes -=3D ARIA_AVX_BLOCK_SIZE;
> +		}
> +		while (nbytes >=3D ARIA_BLOCK_SIZE) {
> +			aria_encrypt(ctx, dst, src);
> +			dst +=3D ARIA_BLOCK_SIZE;
> +			src +=3D ARIA_BLOCK_SIZE;
> +			nbytes -=3D ARIA_BLOCK_SIZE;
> +		}
> +		kernel_fpu_end();

Is aria_encrypt() an FPU function that belongs between kernel_fpu_begin()
and kernel_fpu_end()?

Several drivers (camellia, serpent, twofish, cast5, cast6) use ECB_WALK_STA=
RT,
ECB_BLOCK, and ECB_WALK_END macros for these loops. Those macros do only ca=
ll
kernel_fpu_end() at the very end. That requires the functions to be structu=
red
with (ctx, dst, src) arguments, not (rkey, dst, src, rounds).