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From:   "Kalra, Ashish" <Ashish.Kalra@amd.com>
To:     Borislav Petkov <bp@alien8.de>
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Subject: RE: [PATCH Part2 v6 09/49] x86/fault: Add support to handle the RMP
 fault for user address
Thread-Topic: [PATCH Part2 v6 09/49] x86/fault: Add support to handle the RMP
 fault for user address
Thread-Index: AQHYrBDc30zm/ve2UUW13wSedLDd3a2nIMnggADB+gCAAMFX8IAieiDAgAC6pgCAAI/o0IAA2YMAgAAD/sA=
Date:   Sat, 3 Sep 2022 05:51:09 +0000
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[AMD Official Use Only - General]

Hello Boris,

>> Yes we want to map the faulting address to a RMP entry, but hugepage=20
>> entries in RMP table are basically subpage 4K entries. So it is a 4K=20
>> entry when the page is a 2M one and also a 4K entry when the page is a=20
>> 1G one.

>Wait, what?!

>APM v2 section "15.36.11 Large Page Management" and PSMASH are then for wh=
at exactly?

This is what exactly PSMASH is for, in case the 2MB RMP entry needs to be s=
mashed if guest PVALIDATES a 4K page,
the HV will need to PSMASH the 2MB RMP entry to corresponding 4K RMP entrie=
s during #VMEXIT(NPF).

What I meant above is that 4K RMP table entries need to be available in cas=
e the 2MB RMP entry needs to be
smashed.=20

>> That's why the computation to get a 4K page index within a 2M/1G=20
>> hugepage mapping is required.

>What if a guest RMP-faults on a 2M page and there's a corresponding 2M RMP=
 entry? What do you need the 4K entry then for?

There is no fault here, if guest pvalidates a 2M page that is backed by a 2=
MB RMP entry.
We need the 4K entries in case the guest pvalidates a 4K page that is mappe=
d by a 2MB RMP entry.

>Hell, __snp_lookup_rmpentry() even tries to return the proper page level..=
.

>/me looks in disbelief in your direction...

Thanks,
Ashish