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From:   Neal Liu <neal_liu@aspeedtech.com>
To:     Herbert Xu <herbert@gondor.apana.org.au>
CC:     Linux Crypto Mailing List <linux-crypto@vger.kernel.org>
Subject: RE: [PATCH] crypto: aspeed - Fix sparse warnings
Thread-Topic: [PATCH] crypto: aspeed - Fix sparse warnings
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Date:   Tue, 6 Sep 2022 09:16:40 +0000
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> -----Original Message-----
> From: Herbert Xu <herbert@gondor.apana.org.au>
> Sent: Tuesday, September 6, 2022 1:06 PM
> To: Neal Liu <neal_liu@aspeedtech.com>
> Cc: Linux Crypto Mailing List <linux-crypto@vger.kernel.org>
> Subject: [PATCH] crypto: aspeed - Fix sparse warnings
>=20
> This patch fixes a bunch of bit endianness warnings and two missing stati=
c
> modifiers.
>=20
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

LGTM, thanks.

Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>

> diff --git a/drivers/crypto/aspeed/aspeed-hace-crypto.c
> b/drivers/crypto/aspeed/aspeed-hace-crypto.c
> index ba6158f5cf18..ef73b0028b4d 100644
> --- a/drivers/crypto/aspeed/aspeed-hace-crypto.c
> +++ b/drivers/crypto/aspeed/aspeed-hace-crypto.c
> @@ -258,21 +258,20 @@ static int aspeed_sk_start_sg(struct
> aspeed_hace_dev *hace_dev)
>  	total =3D req->cryptlen;
>=20
>  	for_each_sg(req->src, s, src_sg_len, i) {
> -		src_list[i].phy_addr =3D sg_dma_address(s);
> +		u32 phy_addr =3D sg_dma_address(s);
> +		u32 len =3D sg_dma_len(s);
>=20
> -		if (total > sg_dma_len(s)) {
> -			src_list[i].len =3D sg_dma_len(s);
> -			total -=3D src_list[i].len;
> -
> -		} else {
> +		if (total > len)
> +			total -=3D len;
> +		else {
>  			/* last sg list */
> -			src_list[i].len =3D total;
> -			src_list[i].len |=3D BIT(31);
> +			len =3D total;
> +			len |=3D BIT(31);
>  			total =3D 0;
>  		}
>=20
> -		src_list[i].phy_addr =3D cpu_to_le32(src_list[i].phy_addr);
> -		src_list[i].len =3D cpu_to_le32(src_list[i].len);
> +		src_list[i].phy_addr =3D cpu_to_le32(phy_addr);
> +		src_list[i].len =3D cpu_to_le32(len);
>  	}
>=20
>  	if (total !=3D 0) {
> @@ -290,21 +289,20 @@ static int aspeed_sk_start_sg(struct
> aspeed_hace_dev *hace_dev)
>  		total =3D req->cryptlen;
>=20
>  		for_each_sg(req->dst, s, dst_sg_len, i) {
> -			dst_list[i].phy_addr =3D sg_dma_address(s);
> -
> -			if (total > sg_dma_len(s)) {
> -				dst_list[i].len =3D sg_dma_len(s);
> -				total -=3D dst_list[i].len;
> +			u32 phy_addr =3D sg_dma_address(s);
> +			u32 len =3D sg_dma_len(s);
>=20
> -			} else {
> +			if (total > len)
> +				total -=3D len;
> +			else {
>  				/* last sg list */
> -				dst_list[i].len =3D total;
> -				dst_list[i].len |=3D BIT(31);
> +				len =3D total;
> +				len |=3D BIT(31);
>  				total =3D 0;
>  			}
>=20
> -			dst_list[i].phy_addr =3D cpu_to_le32(dst_list[i].phy_addr);
> -			dst_list[i].len =3D cpu_to_le32(dst_list[i].len);
> +			dst_list[i].phy_addr =3D cpu_to_le32(phy_addr);
> +			dst_list[i].len =3D cpu_to_le32(len);
>=20
>  		}
>=20
> @@ -731,7 +729,7 @@ static void aspeed_crypto_cra_exit(struct
> crypto_skcipher *tfm)
>  	crypto_free_skcipher(ctx->fallback_tfm);
>  }
>=20
> -struct aspeed_hace_alg aspeed_crypto_algs[] =3D {
> +static struct aspeed_hace_alg aspeed_crypto_algs[] =3D {
>  	{
>  		.alg.skcipher =3D {
>  			.min_keysize	=3D AES_MIN_KEY_SIZE,
> @@ -1019,7 +1017,7 @@ struct aspeed_hace_alg aspeed_crypto_algs[] =3D {
>  	},
>  };
>=20
> -struct aspeed_hace_alg aspeed_crypto_algs_g6[] =3D {
> +static struct aspeed_hace_alg aspeed_crypto_algs_g6[] =3D {
>  	{
>  		.alg.skcipher =3D {
>  			.ivsize		=3D AES_BLOCK_SIZE,
> diff --git a/drivers/crypto/aspeed/aspeed-hace-hash.c
> b/drivers/crypto/aspeed/aspeed-hace-hash.c
> index 0a44ffc0e13b..7f7f289fceb7 100644
> --- a/drivers/crypto/aspeed/aspeed-hace-hash.c
> +++ b/drivers/crypto/aspeed/aspeed-hace-hash.c
> @@ -208,6 +208,9 @@ static int aspeed_ahash_dma_prepare_sg(struct
> aspeed_hace_dev *hace_dev)
>  	}
>=20
>  	if (rctx->bufcnt !=3D 0) {
> +		u32 phy_addr;
> +		u32 len;
> +
>  		rctx->buffer_dma_addr =3D dma_map_single(hace_dev->dev,
>  						       rctx->buffer,
>  						       rctx->block_size * 2,
> @@ -218,36 +221,35 @@ static int aspeed_ahash_dma_prepare_sg(struct
> aspeed_hace_dev *hace_dev)
>  			goto free_rctx_digest;
>  		}
>=20
> -		src_list[0].phy_addr =3D rctx->buffer_dma_addr;
> -		src_list[0].len =3D rctx->bufcnt;
> -		length -=3D src_list[0].len;
> +		phy_addr =3D rctx->buffer_dma_addr;
> +		len =3D rctx->bufcnt;
> +		length -=3D len;
>=20
>  		/* Last sg list */
>  		if (length =3D=3D 0)
> -			src_list[0].len |=3D HASH_SG_LAST_LIST;
> +			len |=3D HASH_SG_LAST_LIST;
>=20
> -		src_list[0].phy_addr =3D cpu_to_le32(src_list[0].phy_addr);
> -		src_list[0].len =3D cpu_to_le32(src_list[0].len);
> +		src_list[0].phy_addr =3D cpu_to_le32(phy_addr);
> +		src_list[0].len =3D cpu_to_le32(len);
>  		src_list++;
>  	}
>=20
>  	if (length !=3D 0) {
>  		for_each_sg(rctx->src_sg, s, sg_len, i) {
> -			src_list[i].phy_addr =3D sg_dma_address(s);
> -
> -			if (length > sg_dma_len(s)) {
> -				src_list[i].len =3D sg_dma_len(s);
> -				length -=3D sg_dma_len(s);
> +			u32 phy_addr =3D sg_dma_address(s);
> +			u32 len =3D sg_dma_len(s);
>=20
> -			} else {
> +			if (length > len)
> +				length -=3D len;
> +			else {
>  				/* Last sg list */
> -				src_list[i].len =3D length;
> -				src_list[i].len |=3D HASH_SG_LAST_LIST;
> +				len =3D length;
> +				len |=3D HASH_SG_LAST_LIST;
>  				length =3D 0;
>  			}
>=20
> -			src_list[i].phy_addr =3D cpu_to_le32(src_list[i].phy_addr);
> -			src_list[i].len =3D cpu_to_le32(src_list[i].len);
> +			src_list[i].phy_addr =3D cpu_to_le32(phy_addr);
> +			src_list[i].len =3D cpu_to_le32(len);
>  		}
>  	}
>=20
> @@ -913,7 +915,7 @@ static int aspeed_sham_import(struct ahash_request
> *req, const void *in)
>  	return 0;
>  }
>=20
> -struct aspeed_hace_alg aspeed_ahash_algs[] =3D {
> +static struct aspeed_hace_alg aspeed_ahash_algs[] =3D {
>  	{
>  		.alg.ahash =3D {
>  			.init	=3D aspeed_sham_init,
> @@ -1099,7 +1101,7 @@ struct aspeed_hace_alg aspeed_ahash_algs[] =3D {
>  	},
>  };
>=20
> -struct aspeed_hace_alg aspeed_ahash_algs_g6[] =3D {
> +static struct aspeed_hace_alg aspeed_ahash_algs_g6[] =3D {
>  	{
>  		.alg.ahash =3D {
>  			.init	=3D aspeed_sham_init,
> --
> Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page:
> http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt