Received: by 2002:a05:6358:489b:b0:bb:da1:e618 with SMTP id x27csp1974919rwn; Fri, 16 Sep 2022 03:58:31 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7Y2Ot2uNdpawHpmypCFAYKoKe9AhUrtdoH9nbPTvAyi7IGGC70z/bdYY/mERU9SQjkdkdy X-Received: by 2002:a17:907:1c82:b0:77d:bc83:e192 with SMTP id nb2-20020a1709071c8200b0077dbc83e192mr3254893ejc.712.1663325910916; Fri, 16 Sep 2022 03:58:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663325910; cv=none; d=google.com; s=arc-20160816; b=eJ9kG6jouXdao6XxWzTu6oXC6mLqiAWIOqEAlqw0PjgpzBtSMJiXowQmi1Nv/wxY6T Civ86dt2P3/+bBebQ1EAvWSipENRJz9cx/lWg/c9qcJWs2zlDbcAZBohc4m/RzjEYAG4 BqloW9NuKbmr6VhzP6QJ8NSwzANPw0/rkAFqVm7BEyt0dRNjU3ACe7R+VO6uUnzAQqXm FTDW51QS75bZKU1G23+GaRyZlSf9iIl5S/coyza6a1D0AJX3PwDxVjDm6r0NPmYaUmkX PbYQrRSnkH7Ennz5vW7zJYTdMeNGInY3jaa0HF/RZ8ZTSdCoItBxO2pA/B8t7DBzuXzn oioQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=BNbMh8WGZ5MpEJ2qb84ccys7B1MDQk//OzFOrlOuPCY=; b=az2dMCPWmIpmin39swS+zXn41Dt1DmJwuTGu7LvfwrUO9Fm8O2JX6HWUpFc5YsH7aa sXiaG2viP6VxdsQ8345waFWbqiBGWJ+dmk+tZG88iqrYPqH+S7WSSa4JtiTcU6H6jUeN JM2LRK70K/pqEKZsFlgMmT1NpRoPp6kd3Q/XX9CQbsMF/lpACxkhH8Swoa/qkZybKWk2 YiRBXSr6oO2V40MEos7aJ/6KRLfPwxXFKba063KAVfs4F3tQQ19llxj91av85i7tdkO5 GEgHRfHrHj+p7xcRMIqHHZ8RVFDrByrOsRhe2umGRcS+0b8pesSAnlea648UTAzY7o3h uPrw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id qn8-20020a170907210800b00730d35c35bcsi15056591ejb.574.2022.09.16.03.58.06; Fri, 16 Sep 2022 03:58:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230250AbiIPKyJ (ORCPT + 99 others); Fri, 16 Sep 2022 06:54:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230197AbiIPKxw (ORCPT ); Fri, 16 Sep 2022 06:53:52 -0400 Received: from fornost.hmeau.com (helcar.hmeau.com [216.24.177.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13E39ADCDA; Fri, 16 Sep 2022 03:37:00 -0700 (PDT) Received: from gwarestrin.arnor.me.apana.org.au ([192.168.103.7]) by fornost.hmeau.com with smtp (Exim 4.94.2 #2 (Debian)) id 1oZ8iN-005Gwa-Dv; Fri, 16 Sep 2022 20:36:56 +1000 Received: by gwarestrin.arnor.me.apana.org.au (sSMTP sendmail emulation); Fri, 16 Sep 2022 18:36:55 +0800 Date: Fri, 16 Sep 2022 18:36:55 +0800 From: Herbert Xu To: Weili Qian Cc: linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, wangzhou1@hisilicon.com, liulongfang@huawei.com Subject: Re: [PATCH 00/10] crypto: hisilicon - support get device information from registers Message-ID: References: <20220909094704.32099-1-qianweili@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220909094704.32099-1-qianweili@huawei.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, Sep 09, 2022 at 05:46:54PM +0800, Weili Qian wrote: > This patchset supports obtaining device information from > device registers, including the supported algorithms, > device features, and so on. > > Weili Qian (6): > crypto: hisilicon/qm - get hardware features from hardware registers > crypto: hisilicon/qm - get qp num and depth from hardware registers > crypto: hisilicon/qm - add UACCE_CMD_QM_SET_QP_INFO support > crypto: hisilicon/qm - get error type from hardware registers > crypto: hisilicon/qm - support get device irq information from > hardware registers > crypto: hisilicon/zip - support zip capability > > Wenkai Lin (1): > crypto: hisilicon/sec - get algorithm bitmap from registers > > Zhiqi Song (3): > crypto: hisilicon/hpre - support hpre capability > crypto: hisilicon/hpre - optimize registration of ecdh > crypto: hisilicon - support get algs by the capability register > > drivers/crypto/hisilicon/hpre/hpre.h | 8 +- > drivers/crypto/hisilicon/hpre/hpre_crypto.c | 250 ++++--- > drivers/crypto/hisilicon/hpre/hpre_main.c | 208 +++++- > drivers/crypto/hisilicon/qm.c | 765 +++++++++++++------- > drivers/crypto/hisilicon/sec2/sec.h | 34 +- > drivers/crypto/hisilicon/sec2/sec_crypto.c | 454 +++++++----- > drivers/crypto/hisilicon/sec2/sec_main.c | 160 +++- > drivers/crypto/hisilicon/zip/zip.h | 1 + > drivers/crypto/hisilicon/zip/zip_crypto.c | 73 +- > drivers/crypto/hisilicon/zip/zip_main.c | 256 +++++-- > include/linux/hisi_acc_qm.h | 63 +- > include/uapi/misc/uacce/hisi_qm.h | 17 +- > 12 files changed, 1589 insertions(+), 700 deletions(-) > > -- > 2.33.0 All applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt