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To:     Borislav Petkov <bp@alien8.de>
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Subject: RE: [PATCH Part2 v6 13/49] crypto:ccp: Provide APIs to issue SEV-SNP
 commands
Thread-Topic: [PATCH Part2 v6 13/49] crypto:ccp: Provide APIs to issue SEV-SNP
 commands
Thread-Index: AQHY1dLd4Juks83jB0yfjCsoLH1Lj638u9DQgAAfqQCAAA0/0A==
Date:   Mon, 3 Oct 2022 17:11:05 +0000
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[AMD Official Use Only - General]

>> There are actually only 8 functions

>Only 8?

>Lemme ask it differently then: what is the point of the wrappers at all?

They are basically providing the APIs for the hypervisor to manage a SNP gu=
est.

And this is the original commit for the API to manage the SEV guest:

commit 200664d5237f3f8cd2a2f9f5c5dea08502336bd1
Author: Brijesh Singh <brijesh.singh@amd.com>
Date:   Mon Dec 4 10:57:28 2017 -0600

    crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support
   =20
    AMD's new Secure Encrypted Virtualization (SEV) feature allows the
    memory contents of virtual machines to be transparently encrypted with =
a
    key unique to the VM. The programming and management of the encryption
    keys are handled by the AMD Secure Processor (AMD-SP) which exposes the
    commands for these tasks. The complete spec is available at:
   =20
    http://support.amd.com/TechDocs/55766_SEV-KM%20API_Specification.pdf
   =20
    Extend the AMD-SP driver to provide the following support:
   =20
     - an in-kernel API to communicate with the SEV firmware. The API can b=
e
       used by the hypervisor to create encryption context for a SEV guest.
   =20
     - a userspace IOCTL to manage the platform certificates.
   =20
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: "Radim Kr=E8m=E1=F8" <rkrcmar@redhat.com>
    Cc: Borislav Petkov <bp@suse.de>
    Cc: Herbert Xu <herbert@gondor.apana.org.au>
    Cc: Gary Hook <gary.hook@amd.com>
    Cc: Tom Lendacky <thomas.lendacky@amd.com>
    Cc: linux-crypto@vger.kernel.org
    Cc: kvm@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Improvements-by: Borislav Petkov <bp@suse.de>
    Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>


Thanks,
Ashish