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Miller" , Jussi Kivilinna , Ard Biesheuvel , Mark Brown , Catalin Marinas , Will Deacon , Maxime Coquelin , Alexandre Torgue , linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH v2 12/15] crypto: arm64/sm4 - add CE implementation for ESSIV mode Message-ID: References: <20221018071006.5717-1-tianjia.zhang@linux.alibaba.com> <20221018071006.5717-13-tianjia.zhang@linux.alibaba.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221018071006.5717-13-tianjia.zhang@linux.alibaba.com> X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Tue, Oct 18, 2022 at 03:10:03PM +0800, Tianjia Zhang wrote: > This patch is a CE-optimized assembly implementation for ESSIV mode. > The assembly part is realized by reusing the CBC mode. > > Signed-off-by: Tianjia Zhang Is there still a use case for CBC-ESSIV mode these days, now that everyone is using XTS instead? - Eric