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Date:   Fri, 21 Oct 2022 19:32:37 +0800
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Weili Qian <qianweili@huawei.com>
Cc:     linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
        wangzhou1@hisilicon.com, liulongfang@huawei.com
Subject: Re: [PATCH] crypto: hisilicon/sec - enabling clock gating of the
 address prefetch module
Message-ID: <Y1KDVeP1Jr1dtKVL@gondor.apana.org.au>
References: <20220924103445.64422-1-qianweili@huawei.com>
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On Sat, Sep 24, 2022 at 06:34:45PM +0800, Weili Qian wrote:
> Change the value of clock gating register to 0x7fff to enable
> clock gating of the address prefetch module. When the device is
> idle, the clock is turned off to save power.
> 
> Signed-off-by: Weili Qian <qianweili@huawei.com>
> ---
>  drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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