Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Wed, 02 Nov 2022 09:23:00 -0700
From:   "H. Peter Anvin" <hpa@zytor.com>
To:     "Elliott, Robert (Servers)" <elliott@hpe.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Borislav Petkov <bp@alien8.de>,
        Maxim Levitsky <mlevitsk@redhat.com>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
        Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
        Ingo Molnar <mingo@redhat.com>,
        Josh Poimboeuf <jpoimboe@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Tony Luck <tony.luck@intel.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        "David S. Miller" <davem@davemloft.net>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        "Chang S. Bae" <chang.seok.bae@intel.com>,
        Jane Malalane <jane.malalane@citrix.com>,
        Kees Cook <keescook@chromium.org>,
        Kan Liang <kan.liang@linux.intel.com>,
        Peter Zijlstra <peterz@infradead.org>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@kernel.org>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        Jiri Olsa <jolsa@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        "linux-perf-users@vger.kernel.org" <linux-perf-users@vger.kernel.org>,
        "open list:CRYPTO API" <linux-crypto@vger.kernel.org>
Subject: =?US-ASCII?Q?RE=3A_=5BPATCH_v2_1/5=5D_perf/x86/intel/lbr=3A_use_?= =?US-ASCII?Q?setup=5Fclear=5Fcpu=5Fcap_instead_of_clear=5Fcpu=5Fcap?=
User-Agent: K-9 Mail for Android
In-Reply-To: <MW5PR84MB18428331677C881764E615D2AB399@MW5PR84MB1842.NAMPRD84.PROD.OUTLOOK.COM>
References: <20220718141123.136106-1-mlevitsk@redhat.com> <20220718141123.136106-2-mlevitsk@redhat.com> <Yyh9RDbaRqUR1XSW@zn.tnic> <c105971a72dfe6d46ad75fb7e71f79ba716e081c.camel@redhat.com> <YzGlQBkCSJxY+8Jf@zn.tnic> <c1168e8bd9077a2cc9ef61ee06db7a4e8c0f1600.camel@redhat.com> <Y1EOBAaLbv2CXBDL@zn.tnic> <fd2cf028-bd83-57ff-7e6d-ef3ee11852a1@redhat.com> <MW5PR84MB18428331677C881764E615D2AB399@MW5PR84MB1842.NAMPRD84.PROD.OUTLOOK.COM>
Message-ID: <EFDA4E40-4133-4CED-97FA-DC75AEA24556@zytor.com>
MIME-Version: 1.0
Content-Type: text/plain;
 charset=utf-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On November 2, 2022 7:27:52 AM PDT, "Elliott, Robert (Servers)" <elliott@hp=
e=2Ecom> wrote:
>
>> From: Paolo Bonzini <pbonzini@redhat=2Ecom>
>=2E=2E=2E
>> (2) in particular holds even on bare metal=2E  The kernel bug here is t=
hat
>> X86_FEATURE_AVX only tells you if the instructions are _present_, not i=
f
>> they are _usable_=2E   Indeed, the XCR0 check is present for all other
>> files in arch/x86/crypto, either instead or in addition to
>> boot_cpu_has(X86_FEATURE_AVX)=2E
>>=20
>> Maxim had sent a patch about a year ago to do it in aesni-intel-glue=2E=
c
>> but Dave told him to fix the dependencies instead
>> (https://lore=2Ekernel=2Eorg/all/20211103124614=2E499580-1-
>> mlevitsk@redhat=2Ecom/)=2E
>>   What do you think of applying that patch instead?
>
>Most of the x86 crypto modules using X86_FEATURE_AVX do check
>	cpu_has_xfeatures(XFEATURE_MASK_YMM, =2E=2E=2E
>
>so it's probably prudent to add it to the rest (or remove it everywhere
>if it is not needed)=2E
>
>1=2E Currently checking XSAVE YMM:
>  aria_aesni_avx_glue
>  blake2s-glue
>  camellia_aesni_avx2_glue	camellia_aesni_avx_glue
>  cast5_avx_glue		cast6_avx_glue
>  chacha_glue
>  poly1305_glue
>  serpent_avx2_glue		serpent_avx_glue
>  sha1_ssse3_glue		sha256_ssse3_glue	sha512_ssse3_glue
>  sm3_avx_glue
>  sm4_aesni_avx2_glue	sm4_aesni_avx_glue
>  twofish_avx_glue
>
>Currently not checking XSAVE YMM:
>  aesni-intel_glue
>  curve25519-x86_64
>  nhpoly1305-avx2-glue
>  polyval-clmulni_glue
>
>2=2E Similarly, modules using X86_FEATURE_AVX512F, X86_FEATURE_AVXX512VL
>and/or X86_FEATURE_AVX512BW probably need to check XFEATURE_MASK_AVX512:
>
>Currently checking XSAVE AVX512:
>  blake2s-glue
>  poly1305_glue
>
>Currently not checking XSAVE AVX512:
>  chacha_glue
>
>3=2E Similarly, modules using X86_FEATURE_XMM2 probably need to
>check XFEATURE_MASK_SSE:
>
>Currently checking XSAVE SSE:
>  aegis128-aesni-glue=20
>
>Current not checking XSAVE SSE:
>  nhpoly1305-sse2_glue
>  serpent_sse2_glue
>
>
>

We have a dependency system for CPUID features=2E If you are going to do t=
his (as opposed to "fixing" this in Qemu or just saying "don't do that, it =
isn't a valid hardware configuration=2E"