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From:   Robert Elliott <elliott@hpe.com>
To:     herbert@gondor.apana.org.au, davem@davemloft.net,
        tim.c.chen@linux.intel.com, ap420073@gmail.com, ardb@kernel.org,
        Jason@zx2c4.com, David.Laight@ACULAB.COM, ebiggers@kernel.org,
        linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org
Cc:     Robert Elliott <elliott@hpe.com>
Subject: [PATCH v3 13/17] crypto: x86/sha1, sha256 - load based on CPU features
Date:   Wed,  2 Nov 2022 23:27:36 -0500
Message-Id: <20221103042740.6556-14-elliott@hpe.com>
In-Reply-To: <20221103042740.6556-1-elliott@hpe.com>
References: <20221012215931.3896-1-elliott@hpe.com>
 <20221103042740.6556-1-elliott@hpe.com>
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Like commit aa031b8f702e ("crypto: x86/sha512 - load based on CPU
features"), add module aliases for x86-optimized crypto modules:
        sha1, sha256
based on CPU feature bits so udev gets a chance to load them later in
the boot process when the filesystems are all running.

Signed-off-by: Robert Elliott <elliott@hpe.com>

---
v3 put device table SHA_NI entries inside CONFIG_SHAn_NI ifdefs,
ensure builds properly with arch/x86/Kconfig.assembler changed
to not set CONFIG_AS_SHA*_NI
---
 arch/x86/crypto/sha1_ssse3_glue.c   | 15 +++++++++++++++
 arch/x86/crypto/sha256_ssse3_glue.c | 15 +++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c
index cd390083451f..7269beaa9291 100644
--- a/arch/x86/crypto/sha1_ssse3_glue.c
+++ b/arch/x86/crypto/sha1_ssse3_glue.c
@@ -24,6 +24,7 @@
 #include <linux/types.h>
 #include <crypto/sha1.h>
 #include <crypto/sha1_base.h>
+#include <asm/cpu_device_id.h>
 #include <asm/simd.h>
 
 /* avoid kernel_fpu_begin/end scheduler/rcu stalls */
@@ -326,12 +327,26 @@ static void unregister_sha1_ni(void)
 static inline void unregister_sha1_ni(void) { }
 #endif
 
+static const struct x86_cpu_id module_cpu_ids[] = {
+#ifdef CONFIG_AS_SHA1_NI
+	X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),
+#endif
+	X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
+	X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
+	X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
+	{}
+};
+MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
+
 static int __init sha1_ssse3_mod_init(void)
 {
 	const char *feature_name;
 	const char *driver_name = NULL;
 	int ret;
 
+	if (!x86_match_cpu(module_cpu_ids))
+		return -ENODEV;
+
 #ifdef CONFIG_AS_SHA1_NI
 	/* SHA-NI */
 	if (boot_cpu_has(X86_FEATURE_SHA_NI)) {
diff --git a/arch/x86/crypto/sha256_ssse3_glue.c b/arch/x86/crypto/sha256_ssse3_glue.c
index 692d6f010a4d..5ce42f1d228b 100644
--- a/arch/x86/crypto/sha256_ssse3_glue.c
+++ b/arch/x86/crypto/sha256_ssse3_glue.c
@@ -38,6 +38,7 @@
 #include <crypto/sha2.h>
 #include <crypto/sha256_base.h>
 #include <linux/string.h>
+#include <asm/cpu_device_id.h>
 #include <asm/simd.h>
 
 /* avoid kernel_fpu_begin/end scheduler/rcu stalls */
@@ -397,6 +398,17 @@ static void unregister_sha256_ni(void)
 static inline void unregister_sha256_ni(void) { }
 #endif
 
+static const struct x86_cpu_id module_cpu_ids[] = {
+#ifdef CONFIG_AS_SHA256_NI
+	X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),
+#endif
+	X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
+	X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
+	X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
+	{}
+};
+MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
+
 static int __init sha256_ssse3_mod_init(void)
 {
 	const char *feature_name;
@@ -404,6 +416,9 @@ static int __init sha256_ssse3_mod_init(void)
 	const char *driver_name2 = NULL;
 	int ret;
 
+	if (!x86_match_cpu(module_cpu_ids))
+		return -ENODEV;
+
 #ifdef CONFIG_AS_SHA256_NI
 	/* SHA-NI */
 	if (boot_cpu_has(X86_FEATURE_SHA_NI)) {
-- 
2.37.3