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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id r7-20020ac25f87000000b004971a83f839sm258676lfe.39.2022.11.30.05.20.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Nov 2022 05:20:53 -0800 (PST) Message-ID: <8a8f502e-e0ed-d638-0b56-74edcbca2134@linaro.org> Date: Wed, 30 Nov 2022 14:20:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH 5/6] dt-bindings: crypto: Add bindings for Starfive crypto driver Content-Language: en-US To: Jia Jie Ho , Herbert Xu , "David S . Miller" , Rob Herring , Krzysztof Kozlowski Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20221130055214.2416888-1-jiajie.ho@starfivetech.com> <20221130055214.2416888-6-jiajie.ho@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20221130055214.2416888-6-jiajie.ho@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 30/11/2022 06:52, Jia Jie Ho wrote: > Add documentation to describe Starfive crypto > driver bindings. Please wrap commit message according to Linux coding style / submission process: https://elixir.bootlin.com/linux/v5.18-rc4/source/Documentation/process/submitting-patches.rst#L586 Subject: drop second, redundant "bindings". > > Signed-off-by: Jia Jie Ho > Signed-off-by: Huan Feng > --- > .../bindings/crypto/starfive-crypto.yaml | 109 ++++++++++++++++++ > 1 file changed, 109 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/starfive-crypto.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/starfive-crypto.yaml b/Documentation/devicetree/bindings/crypto/starfive-crypto.yaml > new file mode 100644 > index 000000000000..6b852f774c32 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/starfive-crypto.yaml Filename based on compatible, so starfive,jh7110-crypto.yaml > @@ -0,0 +1,109 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/starfive-crypto.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive Crypto Controller Device Tree Bindings Drop "Device Tree Bindings" > + > +maintainers: > + - Jia Jie Ho > + - William Qiu > + > +properties: > + compatible: > + const: starfive,jh7110-crypto > + > + reg: > + maxItems: 1 > + > + reg-names: > + items: > + - const: secreg Why do you need reg-names for one entry? > + > + clocks: > + items: > + - description: Hardware reference clock > + - description: AHB reference clock > + > + clock-names: > + items: > + - const: sec_hclk > + - const: sec_ahb sec seems redundant, so just "ahb". The first clock then "hclk" or "ref"? > + > + interrupts: > + items: > + - description: Interrupt pin for algo completion > + - description: Interrupt pin for DMA transfer completion > + > + interrupt-names: > + items: > + - const: secirq > + - const: dmairq Drop "irq" from both. > + > + resets: > + items: > + - description: STG domain reset line > + > + reset-names: > + items: > + - const: sec_hre Drop "sec". Why do you need the names for one entry? > + > + enable-side-channel-mitigation: > + description: Enable side-channel-mitigation feature for AES module. > + Enabling this feature will affect the speed performance of > + crypto engine. > + type: boolean Why exactly this is a hardware (DT) property, not runtime? > + > + enable-dma: > + description: Enable data transfer using dedicated DMA controller. > + type: boolean Usually the presence of dmas indicates whether to use or not to use DMA. Do you expect a case where DMA channels are provided by you don't want DMA? Explain such case and describe why it is a hardware/system integration property. > + > + dmas: > + items: > + - description: TX DMA channel > + - description: RX DMA channel > + > + dma-names: > + items: > + - const: sec_m tx > + - const: sec_p rx > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - resets > + - reset-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; Use 4 spaces for example indentation. > + Best regards, Krzysztof