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Miller" , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring , Albert Ou , Conor Dooley , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1 Message-ID: References: <20221231220146.646-1-samuel@sholland.org> <20221231220146.646-2-samuel@sholland.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20221231220146.646-2-samuel@sholland.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a ?crit : > D1 has a crypto engine similar to the one in other Allwinner SoCs. > Like H6, it has a separate MBUS clock gate. > > It also requires the internal RC oscillator to be enabled for the TRNG > to return data, presumably because noise from the oscillator is used as > an entropy source. This is likely the case for earlier variants as well, > but it really only matters for H616 and newer SoCs, as H6 provides no > way to disable the internal oscillator. > > Signed-off-by: Samuel Holland > --- > I noticed that the vendor driver has code to explicitly enable IOSC when > using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by > a different binding/driver in mainline. > > Changes in v2: > - Add TRNG clock > > .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++----- > 1 file changed, 25 insertions(+), 8 deletions(-) > Acked-by: Corentin Labbe Thanks