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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e8-20020a170902ef4800b0019317affa0dsi18440299plx.275.2023.01.12.19.54.40; Thu, 12 Jan 2023 19:54:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231416AbjAMDwB (ORCPT + 99 others); Thu, 12 Jan 2023 22:52:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232178AbjAMDvv (ORCPT ); Thu, 12 Jan 2023 22:51:51 -0500 Received: from formenos.hmeau.com (helcar.hmeau.com [216.24.177.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B9425C1DD; Thu, 12 Jan 2023 19:51:48 -0800 (PST) Received: from loth.rohan.me.apana.org.au ([192.168.167.2]) by formenos.hmeau.com with smtp (Exim 4.94.2 #2 (Debian)) id 1pGB6E-00H55C-R8; Fri, 13 Jan 2023 11:51:27 +0800 Received: by loth.rohan.me.apana.org.au (sSMTP sendmail emulation); Fri, 13 Jan 2023 11:51:26 +0800 Date: Fri, 13 Jan 2023 11:51:26 +0800 From: Herbert Xu To: Samuel Holland Cc: Corentin Labbe , "David S . Miller" , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Rob Herring , Albert Ou , Conor Dooley , Palmer Dabbelt , Paul Walmsley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1 Message-ID: References: <20221231220146.646-1-samuel@sholland.org> <20221231220146.646-2-samuel@sholland.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221231220146.646-2-samuel@sholland.org> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote: > D1 has a crypto engine similar to the one in other Allwinner SoCs. > Like H6, it has a separate MBUS clock gate. > > It also requires the internal RC oscillator to be enabled for the TRNG > to return data, presumably because noise from the oscillator is used as > an entropy source. This is likely the case for earlier variants as well, > but it really only matters for H616 and newer SoCs, as H6 provides no > way to disable the internal oscillator. > > Signed-off-by: Samuel Holland > --- > I noticed that the vendor driver has code to explicitly enable IOSC when > using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by > a different binding/driver in mainline. > > Changes in v2: > - Add TRNG clock > > .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++----- > 1 file changed, 25 insertions(+), 8 deletions(-) This doesn't have an ack from Rob Herring. Would you like me to apply just the crypto patch by itself? Thanks, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt