Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 409F4C63797 for ; Mon, 6 Feb 2023 12:15:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230192AbjBFMPR (ORCPT ); Mon, 6 Feb 2023 07:15:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229865AbjBFMPQ (ORCPT ); Mon, 6 Feb 2023 07:15:16 -0500 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29E0C12051; Mon, 6 Feb 2023 04:15:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=RSckQc2Emh9jJfvS33gHYGvM8sjY/00hI0zuLioFFNM=; b=ntuP4M7dSK2zsWVQTbDs9Ox2Ac V4r4EFjkZ99kyYLqdozZ6xzE+QxqYHoG0WCIaMJeVBoR6Y2BbtLPsYb3i01D2x0modrsfxSX57f8v DF30B1tNGD0ZtMzW6GNbWnE/bcmDfjWi9O6PWHEH/Si4SWWexelyntk5L1wIG2NbBH0WlqmGoT5WP AyMxq8eNX+N/jJLzOfoUuQe06/8Jp7hZdjmobg06aJY4TkJlY21aHVxYTE2KfbswHeSGde/+OdjK2 Dlior1hUsskbO4lX904cgjfDDm8i9Mg06fGrnhOO3gfkmEmyQ166CbjhPt5EUYYdvgrPaRfUt5YvB rcxZk8pQ==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1pP0OE-00GkH1-Ik; Mon, 06 Feb 2023 12:14:31 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 6EA2030030F; Mon, 6 Feb 2023 13:14:28 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 084DE207A0B88; Mon, 6 Feb 2023 13:14:27 +0100 (CET) Date: Mon, 6 Feb 2023 13:14:27 +0100 From: Peter Zijlstra To: Arnd Bergmann Cc: Linus Torvalds , Jonathan Corbet , Will Deacon , Boqun Feng , Mark Rutland , Catalin Marinas , dennis@kernel.org, Tejun Heo , Christoph Lameter , Heiko Carstens , gor@linux.ibm.com, Alexander Gordeev , borntraeger@linux.ibm.com, Sven Schnelle , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Joerg Roedel , suravee.suthikulpanit@amd.com, Robin Murphy , dwmw2@infradead.org, Baolu Lu , Herbert Xu , "David S . Miller" , Pekka Enberg , David Rientjes , Joonsoo Kim , Andrew Morton , Vlastimil Babka , Roman Gushchin , Hyeonggon Yoo <42.hyeyoo@gmail.com>, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-s390@vger.kernel.org, iommu@lists.linux.dev, Linux-Arch , linux-crypto@vger.kernel.org Subject: Re: [PATCH v2 05/10] percpu: Wire up cmpxchg128 Message-ID: References: <20230202145030.223740842@infradead.org> <20230202152655.494373332@infradead.org> <24007667-1ff3-4c86-9c17-a361c3f9f072@app.fastmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Mon, Feb 06, 2023 at 12:24:00PM +0100, Peter Zijlstra wrote: > > Unless I have misunderstood what you are doing, my concerns are > > still the same: > > > > > #define this_cpu_cmpxchg(pcp, oval, nval) \ > > > - __pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval) > > > + __pcpu_size16_call_return2(this_cpu_cmpxchg_, pcp, oval, nval) > > > #define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, > > > nval2) \ > > > __pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, pcp1, pcp2, > > > oval1, oval2, nval1, nval2) > > > > Having a variable-length this_cpu_cmpxchg() that turns into cmpxchg128() > > and cmpxchg64() even on CPUs where this traps (!X86_FEATURE_CX16) seems > > like a bad design to me. > > > > I would much prefer fixed-length this_cpu_cmpxchg64()/this_cpu_cmpxchg128() > > calls that never trap but fall back to the generic version on CPUs that > > are lacking the atomics. > > You're thinking acidental usage etc..? Lemme see what I can do. So lookng at this I remember why I did it like this, currently 32bit archs silently fall back to the generics for most/all 64bit ops. And personally I would just as soon drop support for the !X86_FEATURE_CX* cpus... :/ Those are some serious museum pieces. One problem with silent downgrades like this is that semantics vs NMI change, which makes for subtle bugs on said museum pieces. Basically, using 64bit percpu ops on 32bit is already somewhat dangerous -- wiring up native cmpxchg64 support in that case seemed an improvement. Anyway... let me get on with doing explicit {raw,this}_cpu_cmpxchg{64,128}() thingies.