Message-ID: <96fd2f5c-26af-c995-d6c5-c1e94f65b6a9@gmail.com>
Date:   Sun, 12 Feb 2023 03:30:10 +0900
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Subject: Re: [PATCH] crypto: x86/aria-avx - fix using avx2 instructions
To:     "Elliott, Robert (Servers)" <elliott@hpe.com>,
        "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
        "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "x86@kernel.org" <x86@kernel.org>
Cc:     "erhard_f@mailbox.org" <erhard_f@mailbox.org>
References: <20230210181541.2895144-1-ap420073@gmail.com>
 <MW5PR84MB18427D089F66544E76648A70ABDE9@MW5PR84MB1842.NAMPRD84.PROD.OUTLOOK.COM>
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From:   Taehee Yoo <ap420073@gmail.com>
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On 2/11/23 04:08, Elliott, Robert (Servers) wrote:

Hi Elliott,
Thank you so much for your review!

 >> Unfortunately, this change reduces performance by about 5%.
 >
 > The driver could continue to use functions with AVX2 instructions
 > if AVX2 is supported, and fallback to functions using only
 > AVX instructions if not (assuming AVX is supported).
 >

If CPU supports AVX2, ARIA-AVX2 driver will be worked and it is faster.
But, currently AVX driver requires 16 blocks and AVX2 driver requires 32 
blocks.
So, input block size is less than 32, AVX driver is worked even if cpu 
supports AVX2.
I think the best solution is to make AVX, AVX2, and AVX512 drivers 
support various blocks.
If so, we can use the best performance of ARIA algorithm regardless of 
input block size.
As far as I know, SM4 driver already supports it.
So, I think it would be better for ARIA follows this strategy instead of 
supporting AVX2 instruction in the ARIA-AVX.

Thank you so much!
Taehee Yoo