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Wysocki" , "Rafael J . Wysocki" , Tom Rix , Weili Qian , Herbert Xu , Jonathan Corbet , Marc Zyngier , Daniel Lezcano , Len Brown , Albert Ou , Mark Gross , Hans de Goede , Paul Walmsley , Thomas Gleixner , Anup Patel , Nathan Chancellor , Nick Desaulniers , Zhou Wang , Palmer Dabbelt , Andrew Jones , Maximilian Luz , "David S . Miller" Subject: Re: [PATCH V4 16/23] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Message-ID: <20230404-flatware-ditto-e5c71d5a36c2@spud> References: <20230404182037.863533-1-sunilvl@ventanamicro.com> <20230404182037.863533-17-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="2/wGGnLCOQw3+kxM" Content-Disposition: inline In-Reply-To: <20230404182037.863533-17-sunilvl@ventanamicro.com> X-Spam-Status: No, score=-5.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org --2/wGGnLCOQw3+kxM Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 04, 2023 at 11:50:30PM +0530, Sunil V L wrote: > Refactor the timer init function such that few things can be > shared by both DT and ACPI based platforms. >=20 > Co-developed-by: Anup Patel > Signed-off-by: Anup Patel > Signed-off-by: Sunil V L > Acked-by: Rafael J. Wysocki > Reviewed-by: Andrew Jones Forget an R-b or drop it intentionally from v3? https://lore.kernel.org/linux-riscv/c2c1bdb5-aee6-4f4c-9f7d-073917e75b88@sp= ud/ Please say why if you drop or ignore tags between versions. If this is in fact the same as v3, here's the missing tag: Reviewed-by: Conor Dooley Thanks, Conor. > --- > drivers/clocksource/timer-riscv.c | 81 +++++++++++++++---------------- > 1 file changed, 40 insertions(+), 41 deletions(-) >=20 > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/time= r-riscv.c > index 5f0f10c7e222..cecc4662293b 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -124,61 +124,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, v= oid *dev_id) > return IRQ_HANDLED; > } > =20 > -static int __init riscv_timer_init_dt(struct device_node *n) > +static int __init riscv_timer_init_common(void) > { > - int cpuid, error; > - unsigned long hartid; > - struct device_node *child; > + int error; > struct irq_domain *domain; > + struct fwnode_handle *intc_fwnode =3D riscv_get_intc_hwnode(); > =20 > - error =3D riscv_of_processor_hartid(n, &hartid); > - if (error < 0) { > - pr_warn("Not valid hartid for node [%pOF] error =3D [%lu]\n", > - n, hartid); > - return error; > - } > - > - cpuid =3D riscv_hartid_to_cpuid(hartid); > - if (cpuid < 0) { > - pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); > - return cpuid; > - } > - > - if (cpuid !=3D smp_processor_id()) > - return 0; > - > - child =3D of_find_compatible_node(NULL, NULL, "riscv,timer"); > - if (child) { > - riscv_timer_cannot_wake_cpu =3D of_property_read_bool(child, > - "riscv,timer-cannot-wake-cpu"); > - of_node_put(child); > - } > - > - domain =3D NULL; > - child =3D of_get_compatible_child(n, "riscv,cpu-intc"); > - if (!child) { > - pr_err("Failed to find INTC node [%pOF]\n", n); > - return -ENODEV; > - } > - domain =3D irq_find_host(child); > - of_node_put(child); > + domain =3D irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY); > if (!domain) { > - pr_err("Failed to find IRQ domain for node [%pOF]\n", n); > + pr_err("Failed to find irq_domain for INTC node [%pfwP]\n", > + intc_fwnode); > return -ENODEV; > } > =20 > riscv_clock_event_irq =3D irq_create_mapping(domain, RV_IRQ_TIMER); > if (!riscv_clock_event_irq) { > - pr_err("Failed to map timer interrupt for node [%pOF]\n", n); > + pr_err("Failed to map timer interrupt for node [%pfwP]\n", intc_fwnode= ); > return -ENODEV; > } > =20 > - pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", > - __func__, cpuid, hartid); > error =3D clocksource_register_hz(&riscv_clocksource, riscv_timebase); > if (error) { > - pr_err("RISCV timer register failed [%d] for cpu =3D [%d]\n", > - error, cpuid); > + pr_err("RISCV timer registration failed [%d]\n", error); > return error; > } > =20 > @@ -207,4 +174,36 @@ static int __init riscv_timer_init_dt(struct device_= node *n) > return error; > } > =20 > +static int __init riscv_timer_init_dt(struct device_node *n) > +{ > + int cpuid, error; > + unsigned long hartid; > + struct device_node *child; > + > + error =3D riscv_of_processor_hartid(n, &hartid); > + if (error < 0) { > + pr_warn("Invalid hartid for node [%pOF] error =3D [%lu]\n", > + n, hartid); > + return error; > + } > + > + cpuid =3D riscv_hartid_to_cpuid(hartid); > + if (cpuid < 0) { > + pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); > + return cpuid; > + } > + > + if (cpuid !=3D smp_processor_id()) > + return 0; > + > + child =3D of_find_compatible_node(NULL, NULL, "riscv,timer"); > + if (child) { > + riscv_timer_cannot_wake_cpu =3D of_property_read_bool(child, > + "riscv,timer-cannot-wake-cpu"); > + of_node_put(child); > + } > + > + return riscv_timer_init_common(); > +} > + > TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); > --=20 > 2.34.1 >=20 >=20 > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv --2/wGGnLCOQw3+kxM Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZCyV0gAKCRB4tDGHoIJi 0rJlAP9rogaXV3ucgTvCBAZkBYR+WpLBvWckZ0of2CS8edy2CwD5Ac7q7WeS6lvT 0PKSn5nYFRIl9RObVenJC1edFkd2nAg= =mydC -----END PGP SIGNATURE----- --2/wGGnLCOQw3+kxM--