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From:   meenakshi.aggarwal@nxp.com
To:     horia.geanta@nxp.com, V.sethi@nxp.com, pankaj.gupta@nxp.com,
        gaurav.jain@nxp.com, herbert@gondor.apana.org.au,
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Cc:     Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Subject: [PATCH v3 0/2] No access to CAAM page 0 registers 
Date:   Wed,  5 Apr 2023 11:07:50 +0200
Message-Id: <20230405090752.1708455-1-meenakshi.aggarwal@nxp.com>
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From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>

This series includes patches to reduce access to page 0 registers of
CAAM from non-secure world.

In non-secure world, access to page 0 registers of CAAM is
forbidden, so we are using alias registers available in Job Ring's
register address space.

Allow CAAM's page 0 access to OPTEE, as OPTEE runs in secure world.

changes in v3:
	- Fixed compile time warnings reported by kernel test robot
	- incorporated review comments

changes in v2:
	- Fixed compile time warnings coming with compilation flag W=1

Horia GeantA (2):
  crypto: caam - reduce page 0 regs access to minimum
  crypto: caam - OP-TEE firmware support

 drivers/crypto/caam/caamalg.c  |  21 +++----
 drivers/crypto/caam/caamhash.c |  10 ++--
 drivers/crypto/caam/caampkc.c  |   6 +-
 drivers/crypto/caam/caamrng.c  |   6 +-
 drivers/crypto/caam/ctrl.c     | 106 +++++++++++++++++++++++----------
 drivers/crypto/caam/debugfs.c  |  12 ++--
 drivers/crypto/caam/debugfs.h  |   7 ++-
 drivers/crypto/caam/intern.h   |   1 +
 8 files changed, 110 insertions(+), 59 deletions(-)

-- 
2.25.1