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Subject: Re: [PATCH v4 06/15] dmaengine: idxd: Add wq private data accessors
From:   Tom Zanussi <tom.zanussi@linux.intel.com>
To:     Dave Jiang <dave.jiang@intel.com>, herbert@gondor.apana.org.au,
        davem@davemloft.net, fenghua.yu@intel.com, vkoul@kernel.org
Cc:     tony.luck@intel.com, wajdi.k.feghali@intel.com,
        james.guilford@intel.com, kanchana.p.sridhar@intel.com,
        giovanni.cabiddu@intel.com, linux-kernel@vger.kernel.org,
        linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org
Date:   Mon, 08 May 2023 15:55:55 -0500
In-Reply-To: <2618f557-01a5-f76b-ad09-6eb0871cdf00@intel.com>
References: <cover.1683573703.git.zanussi@kernel.org>
         <038db785a87dc59c0073989633eee0205958cb67.1683573703.git.zanussi@kernel.org>
         <2618f557-01a5-f76b-ad09-6eb0871cdf00@intel.com>
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On Mon, 2023-05-08 at 13:43 -0700, Dave Jiang wrote:
>=20
>=20
> On 5/8/23 1:07 PM, Tom Zanussi wrote:
> > Add the accessors set_idxd_wq_private() and idxd_wq_private()
> > allowing
> > users to set and retrieve a private void * associated with an
> > idxd_wq.
> >=20
> > The private data is stored in the idxd_dev.conf_dev associated with
> > each idxd_wq.
> >=20
> > Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
> > ---
> > =C2=A0 drivers/dma/idxd/idxd.h | 10 ++++++++++
> > =C2=A0 1 file changed, 10 insertions(+)
> >=20
> > diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
> > index 193552dea224..71cd4ca7d27a 100644
> > --- a/drivers/dma/idxd/idxd.h
> > +++ b/drivers/dma/idxd/idxd.h
> > @@ -552,6 +552,16 @@ static inline int idxd_wq_refcount(struct
> > idxd_wq *wq)
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return wq->client_count=
;
> > =C2=A0 };
> > =C2=A0=20
> > +static inline void set_idxd_wq_private(struct idxd_wq *wq, void
> > *private)
>=20
> I would go with the same kernel naming convention:
>=20
> idxd_wq_set_private() and idxd_wq_get_private()?


Yeah, makes sense, will change.

Thanks,

Tom

> > +{
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0dev_set_drvdata(wq_confdev(w=
q), private);
> > +}
> > +
> > +static inline void *idxd_wq_private(struct idxd_wq *wq)
> > +{
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return dev_get_drvdata(wq_co=
nfdev(wq));
> > +}
> > +
> > =C2=A0 /*
> > =C2=A0=C2=A0 * Intel IAA does not support batch processing.
> > =C2=A0=C2=A0 * The max batch size of device, max batch size of wq and