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From:   Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
To:     Bastian Krause <bst@pengutronix.de>,
        Horia Geanta <horia.geanta@nxp.com>,
        Varun Sethi <V.Sethi@nxp.com>,
        Pankaj Gupta <pankaj.gupta@nxp.com>,
        Gaurav Jain <gaurav.jain@nxp.com>,
        "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC:     Victoria Milhoan <vicki.milhoan@freescale.com>,
        Dan Douglass <dan.douglass@nxp.com>,
        Vipul Kumar <vipul_kumar@mentor.com>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>
Subject: RE: [PATCH] crypto: caam - adjust RNG timing to support more devices
Thread-Topic: [PATCH] crypto: caam - adjust RNG timing to support more devices
Thread-Index: AQHZnQeck2v36DTv3UmJ9e2grSaJgq++HokAgAFf5ACAAWGXIA==
Date:   Wed, 19 Jul 2023 07:00:46 +0000
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Hi Bastian,

We have tested the patch on i.mx8mm board and we did not face any issue wit=
h the patch.

Please share your imx8mm board revision and complete logs (including bootlo=
ader logs),
It will help in investigating the issue you are facing.

Thanks,
Meenakshi

> -----Original Message-----
> From: Bastian Krause <bst@pengutronix.de>
> Sent: Tuesday, July 18, 2023 3:13 PM
> To: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Horia Geanta
> <horia.geanta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; Pankaj Gupta
> <pankaj.gupta@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>;
> herbert@gondor.apana.org.au; davem@davemloft.net; linux-
> crypto@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: Victoria Milhoan <vicki.milhoan@freescale.com>; Dan Douglass
> <dan.douglass@nxp.com>; Vipul Kumar <vipul_kumar@mentor.com>;
> kernel@pengutronix.de
> Subject: Re: [PATCH] crypto: caam - adjust RNG timing to support more dev=
ices
>
> On 7/17/23 14:43, Bastian Krause wrote:
> > On 6/12/23 10:26, meenakshi.aggarwal@nxp.com wrote:
> >> From: Victoria Milhoan <vicki.milhoan@freescale.com>
> >>
> >> Adjust RNG timing parameters to support more i.MX6 devices.
> >>
> >> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
> >> Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
> >> Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
> >> Signed-off-by: Horia Geant=E3 <horia.geanta@nxp.com>
> >> ---
> >>   drivers/crypto/caam/ctrl.c | 4 ++--
> >>   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > This patch seems to breaks CAAM RNG instantiation on an i.MX8MM at my e=
nd:
> >
> > caam 30900000.crypto: Entropy delay =3D 3200 caam 30900000.crypto:
> > Entropy delay =3D 3600 [...] caam 30900000.crypto: Entropy delay =3D 12=
400
> > caam 30900000.crypto: failed to instantiate RNG
> > caam: probe of 30900000.crypto failed with error -11
> >
> > If I revert this patch or increase RTSDCTL_ENT_DLY_MAX to a value >
> > 66800, it works again:
> >
> > caam 30900000.crypto: Entropy delay =3D 32800 caam 30900000.crypto:
> > Entropy delay =3D 33200 [...] caam 30900000.crypto: Entropy delay =3D
> > 66800 caam 30900000.crypto: Instantiated RNG4 SH0 caam
> > 30900000.crypto: Instantiated RNG4 SH1 caam 30900000.crypto: device ID
> > =3D 0x0a16040100000000 (Era 9) caam 30900000.crypto: job rings =3D 2, q=
i =3D
> > 0 caam algorithms registered in /proc/crypto caam 30900000.crypto:
> > caam pkc algorithms registered in /proc/crypto caam 30900000.crypto:
> > registering rng-caam Executing RNG SELF-TEST with wait
> > random: crng init done
> > caam 30900000.crypto: rng crypto API alg registered prng-caam
>
> This ^ was the kernel log for..
>
>
> --- a/drivers/crypto/caam/regs.h
> +++ b/drivers/crypto/caam/regs.h
> @@@ -522,7 -522,7 +522,7 @@@ struct rng4tst
>    #define RTSDCTL_ENT_DLY_SHIFT 16
>    #define RTSDCTL_ENT_DLY_MASK (0xffff << RTSDCTL_ENT_DLY_SHIFT)
>    #define RTSDCTL_ENT_DLY_MIN 3200
> --#define RTSDCTL_ENT_DLY_MAX 12800
> ++#define RTSDCTL_ENT_DLY_MAX 70000
>    #define RTSDCTL_SAMP_SIZE_MASK 0xffff
>    #define RTSDCTL_SAMP_SIZE_VAL 512
>          u32 rtsdctl;            /* seed control register */
>
>
> For completion's sake: Reverting this patch..
>
>
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -383,7 +383,7 @@ static void kick_trng(struct device *dev, int ent_del=
ay)
>                  /* min. freq. count, equal to 1/4 of the entropy sample =
length */
>                  wr_reg32(&r4tst->rtfrqmin, val >> 2);
>                  /* max. freq. count, equal to 16 times the entropy sampl=
e length */
> -               wr_reg32(&r4tst->rtfrqmax, val << 4);
> +               wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
>          }
>
>          wr_reg32(&r4tst->rtsdctl, (val << RTSDCTL_ENT_DLY_SHIFT) |
>
>
> ..produces this kernel log (without RNG SELF-TEST):
>
> caam 30900000.crypto: Entropy delay =3D 3200 caam 30900000.crypto: Entrop=
y
> delay =3D 3600 caam 30900000.crypto: Instantiated RNG4 SH0 caam
> 30900000.crypto: Instantiated RNG4 SH1 caam 30900000.crypto: device ID =
=3D
> 0x0a16040100000000 (Era 9) caam 30900000.crypto: job rings =3D 2, qi =3D =
0 caam
> algorithms registered in /proc/crypto caam 30900000.crypto: caam pkc
> algorithms registered in /proc/crypto caam 30900000.crypto: registering r=
ng-
> caam caam 30900000.crypto: rng crypto API alg registered prng-caam
> random: crng init done
>
> Regards,
> Bastian
>
> >>
> >> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> >> index 5fed3cf354c0..62dd069942e4 100644
> >> --- a/drivers/crypto/caam/ctrl.c
> >> +++ b/drivers/crypto/caam/ctrl.c
> >> @@ -383,8 +383,8 @@ static void kick_trng(struct device *dev, int
> >> ent_delay)
> >>       wr_reg32(&r4tst->rtsdctl, val);
> >>       /* min. freq. count, equal to 1/4 of the entropy sample length
> >> */
> >>       wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
> >> -    /* disable maximum frequency count */
> >> -    wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
> >> +    /* max. freq. count, equal to 16 times the entropy sample length
> >> +*/
> >> +    wr_reg32(&r4tst->rtfrqmax, ent_delay << 4);
> >>       /* read the control register */
> >>       val =3D rd_reg32(&r4tst->rtmctl);
> >>   start_rng:
> >
>
> --
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