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From:   Gaurav Jain <gaurav.jain@nxp.com>
To:     Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
        Horia Geanta <horia.geanta@nxp.com>,
        Varun Sethi <V.Sethi@nxp.com>,
        Pankaj Gupta <pankaj.gupta@nxp.com>,
        "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC:     Iuliana Prodan <iuliana.prodan@nxp.com>
Subject: RE: [PATCH] crypto: caam - increase the domain of write memory
 barrier to full system
Thread-Topic: [PATCH] crypto: caam - increase the domain of write memory
 barrier to full system
Thread-Index: AQHZyebjZhlBXUXcS0OCogj503Wqn6/pX1mQ
Date:   Mon, 14 Aug 2023 06:36:03 +0000
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Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Sent: Tuesday, August 8, 2023 4:25 PM
> To: Horia Geanta <horia.geanta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>;
> Pankaj Gupta <pankaj.gupta@nxp.com>; Gaurav Jain <gaurav.jain@nxp.com>;
> herbert@gondor.apana.org.au; davem@davemloft.net; linux-
> crypto@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: Iuliana Prodan <iuliana.prodan@nxp.com>; Meenakshi Aggarwal
> <meenakshi.aggarwal@nxp.com>
> Subject: [PATCH] crypto: caam - increase the domain of write memory barri=
er to
> full system
>=20
> From: Iuliana Prodan <iuliana.prodan@nxp.com>
>=20
> In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb() fail to
> make the input ring be updated before the CAAM starts reading it. So, CAA=
M will
> process, again, an old descriptor address and will put it in the output r=
ing. This
> will make caam_jr_dequeue() to fail, since this old descriptor is not in =
the
> software ring.
> To fix this, use wmb() which works on the full system instead of inner/ou=
ter
> shareable domains.
>=20
> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
>  drivers/crypto/caam/jr.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>=20
> diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index
> 767fbf052536..5507d5d34a4c 100644
> --- a/drivers/crypto/caam/jr.c
> +++ b/drivers/crypto/caam/jr.c
> @@ -464,8 +464,16 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
>  	 * Guarantee that the descriptor's DMA address has been written to
>  	 * the next slot in the ring before the write index is updated, since
>  	 * other cores may update this index independently.
> +	 *
> +	 * Under heavy DDR load, smp_wmb() or dma_wmb() fail to make the
> input
> +	 * ring be updated before the CAAM starts reading it. So, CAAM will
> +	 * process, again, an old descriptor address and will put it in the
> +	 * output ring. This will make caam_jr_dequeue() to fail, since this
> +	 * old descriptor is not in the software ring.
> +	 * To fix this, use wmb() which works on the full system instead of
> +	 * inner/outer shareable domains.
>  	 */
> -	smp_wmb();
> +	wmb();
>=20
>  	jrp->head =3D (head + 1) & (JOBR_DEPTH - 1);
>=20
> --
> 2.25.1