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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id x10-20020a65538a000000b00565e6bce28bsi4568060pgq.796.2023.08.20.00.04.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 00:04:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id EE78323376E; Sat, 19 Aug 2023 11:34:20 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229603AbjHSEMp (ORCPT + 99 others); Sat, 19 Aug 2023 00:12:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229532AbjHSEMb (ORCPT ); Sat, 19 Aug 2023 00:12:31 -0400 Received: from 167-179-156-38.a7b39c.syd.nbn.aussiebb.net (167-179-156-38.a7b39c.syd.nbn.aussiebb.net [167.179.156.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C96A126AB for ; Fri, 18 Aug 2023 21:12:27 -0700 (PDT) Received: from loth.rohan.me.apana.org.au ([192.168.167.2]) by formenos.hmeau.com with smtp (Exim 4.94.2 #2 (Debian)) id 1qXDJv-005Ymg-4r; Sat, 19 Aug 2023 12:12:16 +0800 Received: by loth.rohan.me.apana.org.au (sSMTP sendmail emulation); Sat, 19 Aug 2023 12:12:15 +0800 Date: Sat, 19 Aug 2023 12:12:15 +0800 From: Herbert Xu To: Ard Biesheuvel Cc: Weili Qian , Will Deacon , Arnd Bergmann , linux-crypto@vger.kernel.org, shenyang39@huawei.com, liulongfang@huawei.com Subject: Re: [PATCH v2 1/7] crypto: hisilicon/qm - obtain the mailbox configuration at one time Message-ID: References: <20230811140749.5202-1-qianweili@huawei.com> <20230811140749.5202-2-qianweili@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=2.7 required=5.0 tests=BAYES_00,HELO_DYNAMIC_IPADDR2, PDS_RDNS_DYNAMIC_FP,RCVD_IN_DNSWL_BLOCKED,RDNS_DYNAMIC,SPF_HELO_NONE, SPF_PASS,TVD_RCVD_IP,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: ** X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, Aug 18, 2023 at 12:21:02PM +0200, Ard Biesheuvel wrote: > > IIRC there have been other cases (ThunderX?) where 128 bit MMIO > accessors were needed for some peripheral, but common arm64 helpers > were rejected on the basis that this atomic behavior is not > architectural. > > Obviously, using inline asm in the driver is not the right way either, > so perhaps we should consider introducing some common infrastructure > anyway, including some expectation management about their guarantees. The ones in drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h look better. So perhaps copy them into hisilicon? Cheers, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt